| Summary: | A self, partial and dynamic approach to reconfiguration makes it possible to obtain higher flexibility and better performance with respect to simpler approaches; however, the price for this improvement lies in the increased difficulties in the reconfigurable system creation and management, which become significantly more complex. An automated or semiautomated way to support this kind of systems would simplify the problem by raising the level of abstraction at which the designer has to operate. The aim of this work is the creation of a complete workflow to help the designer in the creation and management of self partially and dynamically reconfigurable systems: the designer should only specify the application, the reconfigurable device, the reconfiguration model (1D vs 2D) and the type of communication infrastructure, and the automated flow will deal with the subsequent steps down to the final architecture implementation. Among other aspects, the provided support includes the definition of area constraint for cores, the creation of an efficient runtime solution for core allocation management and the generation of a solution to obtain internal and fast relocation of cores.
|
|---|