A 512kb 8T SRAM macro operating down to 0.57V with an AC-coupled sense amplifier and embedded data-retention-voltage sensor in 45nm SOI CMOS
An 8T SRAM fabricated in 45 nm SOI CMOS exhibits voltage scalable operation from 1.2 V down to 0.57 V with access times from 400 ps to 3.4 ns. Timing variation and the challenge of low-voltage operation are addressed with an AC-coupled sense amplifier. An area efficient data path is achieved with a...
| Main Authors: | , , , |
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| Other Authors: | |
| Format: | Article |
| Language: | en_US |
| Published: |
Institute of Electrical and Electronics Engineers
2011
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| Online Access: | http://hdl.handle.net/1721.1/62194 https://orcid.org/0000-0002-5977-2748 |
| Summary: | An 8T SRAM fabricated in 45 nm SOI CMOS exhibits voltage scalable operation from 1.2 V down to 0.57 V with access times from 400 ps to 3.4 ns. Timing variation and the challenge of low-voltage operation are addressed with an AC-coupled sense amplifier. An area efficient data path is achieved with a regenerative global-bitline scheme. Finally, a data-retention-voltage sensor is developed to predict the mismatch-limited minimum-standby voltage without corrupting the content of the memory. |
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