Hardware implementation of wireless bit rate adaptation
Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2010.
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Formato: | Thesis |
Idioma: | eng |
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Massachusetts Institute of Technology
2011
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Acceso en liña: | http://hdl.handle.net/1721.1/62641 |
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author | Gross, Samuel A |
author2 | Hari Balakrishnan. |
author_facet | Hari Balakrishnan. Gross, Samuel A |
author_sort | Gross, Samuel A |
collection | MIT |
description | Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2010. |
first_indexed | 2024-09-23T08:18:31Z |
format | Thesis |
id | mit-1721.1/62641 |
institution | Massachusetts Institute of Technology |
language | eng |
last_indexed | 2024-09-23T08:18:31Z |
publishDate | 2011 |
publisher | Massachusetts Institute of Technology |
record_format | dspace |
spelling | mit-1721.1/626412019-04-09T17:52:35Z Hardware implementation of wireless bit rate adaptation Gross, Samuel A Hari Balakrishnan. Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. Electrical Engineering and Computer Science. Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2010. Cataloged from PDF version of thesis. Includes bibliographical references (p. 43-44). This thesis presents a hardware implementation of the SoftRate bit-rate adaptation protocol. SoftRate is a new bit-rate adaptation protocol, which uses per-bit confidence hints generated by the convolutional decoder to estimate the channel bit-error rate. Implementing SoftRate requires changes to both the physical and media access control layers. which precludes using existing commodity 802.11 hardware. This project developed a SoftRate implementation on top of Airblue, an FPGA platform for developing wireless protocols. We present a hardware implementation of SoftRate which meets 802.11 timing requirements. by Samuel A. Gross. M.Eng. 2011-05-09T15:12:59Z 2011-05-09T15:12:59Z 2010 2010 Thesis http://hdl.handle.net/1721.1/62641 712966491 eng M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. http://dspace.mit.edu/handle/1721.1/7582 44 p. application/pdf Massachusetts Institute of Technology |
spellingShingle | Electrical Engineering and Computer Science. Gross, Samuel A Hardware implementation of wireless bit rate adaptation |
title | Hardware implementation of wireless bit rate adaptation |
title_full | Hardware implementation of wireless bit rate adaptation |
title_fullStr | Hardware implementation of wireless bit rate adaptation |
title_full_unstemmed | Hardware implementation of wireless bit rate adaptation |
title_short | Hardware implementation of wireless bit rate adaptation |
title_sort | hardware implementation of wireless bit rate adaptation |
topic | Electrical Engineering and Computer Science. |
url | http://hdl.handle.net/1721.1/62641 |
work_keys_str_mv | AT grosssamuela hardwareimplementationofwirelessbitrateadaptation |