SWIFT: A SWing-reduced Interconnect For a Token-based Network-on-Chip in 90nm CMOS
With the advent of chip multi-processors (CMPs), on-chip networks are critical for providing low-power communications that scale to high core counts. With this motivation, we present a 64-bit, 8×8 mesh Network-on-Chip in 90nm CMOS that: (a) bypasses flit buffering in routers using Token Flow Control...
| Main Authors: | , , , , |
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| Other Authors: | |
| Format: | Article |
| Language: | en_US |
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Institute of Electrical and Electronics Engineers
2011
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| Online Access: | http://hdl.handle.net/1721.1/63111 https://orcid.org/0000-0001-9010-6519 |
| _version_ | 1826199701224947712 |
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| author | Krishna, Tushar Postman, Jacob Edmonds, Christopher Peh, Li-Shiuan Chang, Patrick |
| author2 | Massachusetts Institute of Technology. Computer Science and Artificial Intelligence Laboratory |
| author_facet | Massachusetts Institute of Technology. Computer Science and Artificial Intelligence Laboratory Krishna, Tushar Postman, Jacob Edmonds, Christopher Peh, Li-Shiuan Chang, Patrick |
| author_sort | Krishna, Tushar |
| collection | MIT |
| description | With the advent of chip multi-processors (CMPs), on-chip networks are critical for providing low-power communications that scale to high core counts. With this motivation, we present a 64-bit, 8×8 mesh Network-on-Chip in 90nm CMOS that: (a) bypasses flit buffering in routers using Token Flow Control, thereby reducing buffer power along the control path, and (b) uses low-voltage-swing crossbars and links to reduce interconnect energy in the data path. These approaches enable 38% power savings and 39% latency reduction, when compared with an equivalent baseline network. An experimental 2×2 core prototype, operating at 400 MHz, validates our design. |
| first_indexed | 2024-09-23T11:24:13Z |
| format | Article |
| id | mit-1721.1/63111 |
| institution | Massachusetts Institute of Technology |
| language | en_US |
| last_indexed | 2024-09-23T11:24:13Z |
| publishDate | 2011 |
| publisher | Institute of Electrical and Electronics Engineers |
| record_format | dspace |
| spelling | mit-1721.1/631112022-10-01T03:22:27Z SWIFT: A SWing-reduced Interconnect For a Token-based Network-on-Chip in 90nm CMOS Krishna, Tushar Postman, Jacob Edmonds, Christopher Peh, Li-Shiuan Chang, Patrick Massachusetts Institute of Technology. Computer Science and Artificial Intelligence Laboratory Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science Peh, Li-Shiuan Peh, Li-Shiuan Krishna, Tushar With the advent of chip multi-processors (CMPs), on-chip networks are critical for providing low-power communications that scale to high core counts. With this motivation, we present a 64-bit, 8×8 mesh Network-on-Chip in 90nm CMOS that: (a) bypasses flit buffering in routers using Token Flow Control, thereby reducing buffer power along the control path, and (b) uses low-voltage-swing crossbars and links to reduce interconnect energy in the data path. These approaches enable 38% power savings and 39% latency reduction, when compared with an equivalent baseline network. An experimental 2×2 core prototype, operating at 400 MHz, validates our design. National Science Foundation (U.S.) (CCF- 0811820) National Science Foundation (U.S.) (NSF Grant CCF-0811375) Microelectronics Advanced Research Corporation (MARCO) Semiconductor Research Corporation. Interconnect Focus Center GigaScale Systems Research Center 2011-05-25T15:28:28Z 2011-05-25T15:28:28Z 2010-11 2010-10 Article http://purl.org/eprint/type/ConferencePaper 978-1-4244-8936-7 1063-6404 INSPEC Accession Number: 11675656 http://hdl.handle.net/1721.1/63111 Krishna, T. et al. “SWIFT: A SWing-reduced Interconnect for a Token-based Network-on-Chip in 90nm CMOS.” Computer Design (ICCD), 2010 IEEE International Conference On. 2010. 439-446. © 2010 IEEE. https://orcid.org/0000-0001-9010-6519 en_US http://dx.doi.org/10.1109/ICCD.2010.5647666 IEEE International Conference on Computer Design (ICCD), 2010 Article is made available in accordance with the publisher's policy and may be subject to US copyright law. Please refer to the publisher's site for terms of use. application/pdf Institute of Electrical and Electronics Engineers MIT web domain |
| spellingShingle | Krishna, Tushar Postman, Jacob Edmonds, Christopher Peh, Li-Shiuan Chang, Patrick SWIFT: A SWing-reduced Interconnect For a Token-based Network-on-Chip in 90nm CMOS |
| title | SWIFT: A SWing-reduced Interconnect For a Token-based Network-on-Chip in 90nm CMOS |
| title_full | SWIFT: A SWing-reduced Interconnect For a Token-based Network-on-Chip in 90nm CMOS |
| title_fullStr | SWIFT: A SWing-reduced Interconnect For a Token-based Network-on-Chip in 90nm CMOS |
| title_full_unstemmed | SWIFT: A SWing-reduced Interconnect For a Token-based Network-on-Chip in 90nm CMOS |
| title_short | SWIFT: A SWing-reduced Interconnect For a Token-based Network-on-Chip in 90nm CMOS |
| title_sort | swift a swing reduced interconnect for a token based network on chip in 90nm cmos |
| url | http://hdl.handle.net/1721.1/63111 https://orcid.org/0000-0001-9010-6519 |
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