HAsim : cycle-accurate multicore performance models on FPGAs
Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2011.
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| Format: | Thesis |
| Language: | eng |
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Massachusetts Institute of Technology
2011
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| Online Access: | http://hdl.handle.net/1721.1/64584 |
| _version_ | 1811003329573027840 |
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| author | Pellauer, Michael (Michael Ignatius) |
| author2 | Arvind and Joel Emer. |
| author_facet | Arvind and Joel Emer. Pellauer, Michael (Michael Ignatius) |
| author_sort | Pellauer, Michael (Michael Ignatius) |
| collection | MIT |
| description | Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2011. |
| first_indexed | 2024-09-23T16:02:42Z |
| format | Thesis |
| id | mit-1721.1/64584 |
| institution | Massachusetts Institute of Technology |
| language | eng |
| last_indexed | 2024-09-23T16:02:42Z |
| publishDate | 2011 |
| publisher | Massachusetts Institute of Technology |
| record_format | dspace |
| spelling | mit-1721.1/645842019-04-11T02:43:31Z HAsim : cycle-accurate multicore performance models on FPGAs Cycle-accurate multicore performance models on FPGAs Pellauer, Michael (Michael Ignatius) Arvind and Joel Emer. Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. Electrical Engineering and Computer Science. Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2011. Cataloged from PDF version of thesis. Includes bibliographical references (p. 159-165). The goal of this project is to improve computer architecture by accelerating cycle-accurate performance modeling of multicore processors using FPGAs. Contributions include a distributed technique controlling simulation on a highly-parallel substrate, hardware design techniques to reduce development effort, and a specific framework for modeling shared-memory multicore processors paired with realistic On-Chip Networks. by Michael Pellauer. Ph.D. 2011-06-20T15:55:35Z 2011-06-20T15:55:35Z 2011 2011 Thesis http://hdl.handle.net/1721.1/64584 727060586 eng M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. http://dspace.mit.edu/handle/1721.1/7582 165 p. application/pdf Massachusetts Institute of Technology |
| spellingShingle | Electrical Engineering and Computer Science. Pellauer, Michael (Michael Ignatius) HAsim : cycle-accurate multicore performance models on FPGAs |
| title | HAsim : cycle-accurate multicore performance models on FPGAs |
| title_full | HAsim : cycle-accurate multicore performance models on FPGAs |
| title_fullStr | HAsim : cycle-accurate multicore performance models on FPGAs |
| title_full_unstemmed | HAsim : cycle-accurate multicore performance models on FPGAs |
| title_short | HAsim : cycle-accurate multicore performance models on FPGAs |
| title_sort | hasim cycle accurate multicore performance models on fpgas |
| topic | Electrical Engineering and Computer Science. |
| url | http://hdl.handle.net/1721.1/64584 |
| work_keys_str_mv | AT pellauermichaelmichaelignatius hasimcycleaccuratemulticoreperformancemodelsonfpgas AT pellauermichaelmichaelignatius cycleaccuratemulticoreperformancemodelsonfpgas |