ORION 2.0: A Power-Area Simulator for Interconnection Networks
As industry moves towards multicore chips, networks-on-chip (NoCs) are emerging as the scalable fabric for interconnecting the cores. With power now the first-order design constraint, early-stage estimation of NoC power has become crucially important. In this work, we present ORION 2.0, an enhanced...
| Main Authors: | , , , |
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| Other Authors: | |
| Format: | Article |
| Language: | en_US |
| Published: |
Institute of Electrical and Electronics Engineers
2011
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| Online Access: | http://hdl.handle.net/1721.1/67492 https://orcid.org/0000-0001-9010-6519 |