Investigation of hole mobility in gate-all-around Si nanowire p-MOSFETs with high-k/metal-gate: Effects of hydrogen thermal annealing and nanowire shape

A detailed study of hole mobility is presented for gate-all-around Si nanowire p-MOSFETs with conformal high-κ/MG and various high-temperature hydrogen annealing processes. Hole mobility enhancement relative to planar SOI devices and universal (100) is observed for 15 nm-diameter circular Si nanowir...

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Main Authors: Hashemi, Pouya, Teherani, James T., Hoyt, Judy L.
Other Authors: Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Format: Article
Language:en_US
Published: Institute of Electrical and Electronics Engineers (IEEE) 2012
Online Access:http://hdl.handle.net/1721.1/71882
https://orcid.org/0000-0002-7778-8073
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author Hashemi, Pouya
Teherani, James T.
Hoyt, Judy L.
author2 Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
author_facet Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Hashemi, Pouya
Teherani, James T.
Hoyt, Judy L.
author_sort Hashemi, Pouya
collection MIT
description A detailed study of hole mobility is presented for gate-all-around Si nanowire p-MOSFETs with conformal high-κ/MG and various high-temperature hydrogen annealing processes. Hole mobility enhancement relative to planar SOI devices and universal (100) is observed for 15 nm-diameter circular Si nanowires, due to an optimized anneal process which smoothes and reshapes the suspended nanowires. Increasing hole mobility is experimentally observed with decreasing nanowire width down to 12 nm. The measured inversion capacitance-voltage characteristics are in excellent agreement with quantum mechanical simulations. In addition, a method to extract areal inversion charge density in Si nanowires is introduced and its impact on the mobility of Si nanowires with various shapes is explored.
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spelling mit-1721.1/718822022-10-01T22:02:05Z Investigation of hole mobility in gate-all-around Si nanowire p-MOSFETs with high-k/metal-gate: Effects of hydrogen thermal annealing and nanowire shape Hashemi, Pouya Teherani, James T. Hoyt, Judy L. Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science Massachusetts Institute of Technology. Microsystems Technology Laboratories Hoyt, Judy L. Hashemi, Pouya Teherani, James T. Hoyt, Judy L. A detailed study of hole mobility is presented for gate-all-around Si nanowire p-MOSFETs with conformal high-κ/MG and various high-temperature hydrogen annealing processes. Hole mobility enhancement relative to planar SOI devices and universal (100) is observed for 15 nm-diameter circular Si nanowires, due to an optimized anneal process which smoothes and reshapes the suspended nanowires. Increasing hole mobility is experimentally observed with decreasing nanowire width down to 12 nm. The measured inversion capacitance-voltage characteristics are in excellent agreement with quantum mechanical simulations. In addition, a method to extract areal inversion charge density in Si nanowires is introduced and its impact on the mobility of Si nanowires with various shapes is explored. Semiconductor Research Corporation. Center for Materials, Structures and Devices 2012-07-30T12:40:12Z 2012-07-30T12:40:12Z 2011-01 2010-12 Article http://purl.org/eprint/type/ConferencePaper 978-1-4424-7418-5 978-1-4244-7419-6 http://hdl.handle.net/1721.1/71882 Hashemi, Pouya, James T. Teherani, and Judy L. Hoyt. “Investigation of Hole Mobility in Gate-all-around Si Nanowire p-MOSFETs with high-к/metal-gate: Effects of Hydrogen Thermal Annealing and Nanowire Shape.” IEEE, 2010. 34.5.1–34.5.4. © Copyright 2010 IEEE https://orcid.org/0000-0002-7778-8073 en_US http://dx.doi.org/ 10.1109/IEDM.2010.5703477 2010 IEEE International Electron Devices Meeting (IEDM) Article is made available in accordance with the publisher's policy and may be subject to US copyright law. Please refer to the publisher's site for terms of use. application/pdf Institute of Electrical and Electronics Engineers (IEEE) IEEE
spellingShingle Hashemi, Pouya
Teherani, James T.
Hoyt, Judy L.
Investigation of hole mobility in gate-all-around Si nanowire p-MOSFETs with high-k/metal-gate: Effects of hydrogen thermal annealing and nanowire shape
title Investigation of hole mobility in gate-all-around Si nanowire p-MOSFETs with high-k/metal-gate: Effects of hydrogen thermal annealing and nanowire shape
title_full Investigation of hole mobility in gate-all-around Si nanowire p-MOSFETs with high-k/metal-gate: Effects of hydrogen thermal annealing and nanowire shape
title_fullStr Investigation of hole mobility in gate-all-around Si nanowire p-MOSFETs with high-k/metal-gate: Effects of hydrogen thermal annealing and nanowire shape
title_full_unstemmed Investigation of hole mobility in gate-all-around Si nanowire p-MOSFETs with high-k/metal-gate: Effects of hydrogen thermal annealing and nanowire shape
title_short Investigation of hole mobility in gate-all-around Si nanowire p-MOSFETs with high-k/metal-gate: Effects of hydrogen thermal annealing and nanowire shape
title_sort investigation of hole mobility in gate all around si nanowire p mosfets with high k metal gate effects of hydrogen thermal annealing and nanowire shape
url http://hdl.handle.net/1721.1/71882
https://orcid.org/0000-0002-7778-8073
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