Zero-crossing detector based reconfigurable analog system
A reconfigurable analog system is presented that implements pipelined ADCs, switched-capacitor filters, and programmable gain amplifiers. Each block employs a zero-crossing based circuit for easy reconfigurability and power efficiency. Configured as a 10-bit ADC, the chip consumes 1.92mW at 50MSPS w...
| Main Authors: | , , |
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| Other Authors: | |
| Format: | Article |
| Language: | en_US |
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Institute of Electrical and Electronics Engineers (IEEE)
2012
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| Online Access: | http://hdl.handle.net/1721.1/72194 https://orcid.org/0000-0002-7783-0403 https://orcid.org/0000-0002-5977-2748 |
| _version_ | 1811073541283512320 |
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| author | Lajevardi, Payam Chandrakasan, Anantha P. Lee, Hae-Seung |
| author2 | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science |
| author_facet | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science Lajevardi, Payam Chandrakasan, Anantha P. Lee, Hae-Seung |
| author_sort | Lajevardi, Payam |
| collection | MIT |
| description | A reconfigurable analog system is presented that implements pipelined ADCs, switched-capacitor filters, and programmable gain amplifiers. Each block employs a zero-crossing based circuit for easy reconfigurability and power efficiency. Configured as a 10-bit ADC, the chip consumes 1.92mW at 50MSPS with ENOB of 8.02b and FOM of 150fJ/conversion-step. A third order Butterworth filter is also demonstrated. The chip is implemented in 65nm technology. |
| first_indexed | 2024-09-23T09:34:36Z |
| format | Article |
| id | mit-1721.1/72194 |
| institution | Massachusetts Institute of Technology |
| language | en_US |
| last_indexed | 2024-09-23T09:34:36Z |
| publishDate | 2012 |
| publisher | Institute of Electrical and Electronics Engineers (IEEE) |
| record_format | dspace |
| spelling | mit-1721.1/721942022-09-30T15:23:08Z Zero-crossing detector based reconfigurable analog system Lajevardi, Payam Chandrakasan, Anantha P. Lee, Hae-Seung Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science Chandrakasan, Anantha P. Lajevardi, Payam Chandrakasan, Anantha P. Lee, Hae-Seung A reconfigurable analog system is presented that implements pipelined ADCs, switched-capacitor filters, and programmable gain amplifiers. Each block employs a zero-crossing based circuit for easy reconfigurability and power efficiency. Configured as a 10-bit ADC, the chip consumes 1.92mW at 50MSPS with ENOB of 8.02b and FOM of 150fJ/conversion-step. A third order Butterworth filter is also demonstrated. The chip is implemented in 65nm technology. Massachusetts Institute of Technology. Center for Integrated Circuits and Systems 2012-08-17T18:21:42Z 2012-08-17T18:21:42Z 2010-11 2010-11 Article http://purl.org/eprint/type/ConferencePaper 978-1-4244-8300-6 http://hdl.handle.net/1721.1/72194 Lajevardi, P, A Chandrakasan, and Hae-Seung Lee. “Zero-crossing Detector Based Reconfigurable Analog System.” 2010 IEEE Asian Solid State Circuits Conference (A-SSCC), 2010. 1–4. © Copyright 2010 IEEE https://orcid.org/0000-0002-7783-0403 https://orcid.org/0000-0002-5977-2748 en_US http://dx.doi.org/10.1109/ASSCC.2010.5716604 2010 IEEE Asian Solid State Circuits Conference (A-SSCC) Article is made available in accordance with the publisher's policy and may be subject to US copyright law. Please refer to the publisher's site for terms of use. application/pdf Institute of Electrical and Electronics Engineers (IEEE) IEEE |
| spellingShingle | Lajevardi, Payam Chandrakasan, Anantha P. Lee, Hae-Seung Zero-crossing detector based reconfigurable analog system |
| title | Zero-crossing detector based reconfigurable analog system |
| title_full | Zero-crossing detector based reconfigurable analog system |
| title_fullStr | Zero-crossing detector based reconfigurable analog system |
| title_full_unstemmed | Zero-crossing detector based reconfigurable analog system |
| title_short | Zero-crossing detector based reconfigurable analog system |
| title_sort | zero crossing detector based reconfigurable analog system |
| url | http://hdl.handle.net/1721.1/72194 https://orcid.org/0000-0002-7783-0403 https://orcid.org/0000-0002-5977-2748 |
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