Self-aware Computing in the Angstrom Processor
Addressing the challenges of extreme scale computing requires holistic design of new programming models and systems that support those models. This paper discusses the Angstrom processor, which is designed to support a new Self-aware Computing (SEEC) model. In SEEC, applications explicitly state goa...
Auteurs principaux: | Hoffmann, Henry Christian, Holt, Jim, Kurian, George, Lau, Eric, Maggio, Martina, Miller, Jason E., Neuman, Sabrina M., Sinangil, Mahmut Ersin, Sinangil, Yildiz, Agarwal, Anant, Chandrakasan, Anantha P., Devadas, Srinivas |
---|---|
Autres auteurs: | Massachusetts Institute of Technology. Computer Science and Artificial Intelligence Laboratory |
Format: | Article |
Langue: | en_US |
Publié: |
Association for Computing Machinery (ACM)
2012
|
Accès en ligne: | http://hdl.handle.net/1721.1/72583 https://orcid.org/0000-0001-8253-7714 https://orcid.org/0000-0002-7015-4262 https://orcid.org/0000-0002-5977-2748 https://orcid.org/0000-0001-5772-5916 |
Documents similaires
-
A 45nm 0.5V 8T column-interleaved SRAM with on-chip reference selection loop for sense-amplifier
par: Sinangil, Mahmut Ersin, et autres
Publié: (2011) -
A Reconfigurable 8T Ultra-Dynamic Voltage Scalable (U-DVS) SRAM in 65 nm CMOS
par: Verma, Naveen, et autres
Publié: (2010) -
An embedded energy monitoring circuit for a 128kbit SRAM with body-biased sense-amplifiers
par: Sinangil, Yildiz, et autres
Publié: (2015) -
An SRAM using output prediction to reduce BL-switching activity and statistically-gated SA for up to 1.9× reduction in energy/access
par: Chandrakasan, Anantha P., et autres
Publié: (2015) -
Application-Specific SRAM Design Using Output Prediction to Reduce Bit-Line Switching Activity and Statistically Gated Sense Amplifiers for Up to 1.9x Lower Energy/Access
par: Sinangil, Mahmut E., et autres
Publié: (2015)