Channel coding for high-speed links: A systematic look at code performance and system simulation
While channel coding is a standard method of improving a system's energy efficiency in digital communications, its practice does not extend to high-speed links. Increasing demands in network speeds are placing a large burden on the energy efficiency of high-speed links and render the benefit of...
| Main Authors: | , , |
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| Format: | Article |
| Language: | en_US |
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Institute of Electrical and Electronics Engineers (IEEE)
2012
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| Online Access: | http://hdl.handle.net/1721.1/73087 |
| _version_ | 1811071916000149504 |
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| author | Blitvic, Natasa Stojanovic, Vladimir Marko Lee, Maxine |
| author2 | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science |
| author_facet | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science Blitvic, Natasa Stojanovic, Vladimir Marko Lee, Maxine |
| author_sort | Blitvic, Natasa |
| collection | MIT |
| description | While channel coding is a standard method of improving a system's energy efficiency in digital communications, its practice does not extend to high-speed links. Increasing demands in network speeds are placing a large burden on the energy efficiency of high-speed links and render the benefit of channel coding for these systems a timely subject. The low error rates of interest and the presence of residual intersymbol interference (ISI) caused by hardware constraints impede the analysis and simulation of coded high-speed links. Focusing on the residual ISI and combined noise as the dominant error mechanisms, this paper analyzes error correlation through concepts of error region, channel signature, and correlation distance. This framework provides a deeper insight into joint error behaviors in high-speed links, extends the range of statistical simulation for coded high-speed links, and provides a case against the use of biased Monte Carlo methods in this setting. Finally, based on a hardware test bed, the performance of standard binary forward error correction and error detection schemes is evaluated, from which recommendations on coding for high-speed links are derived. |
| first_indexed | 2024-09-23T08:58:03Z |
| format | Article |
| id | mit-1721.1/73087 |
| institution | Massachusetts Institute of Technology |
| language | en_US |
| last_indexed | 2024-09-23T08:58:03Z |
| publishDate | 2012 |
| publisher | Institute of Electrical and Electronics Engineers (IEEE) |
| record_format | dspace |
| spelling | mit-1721.1/730872022-09-30T12:27:53Z Channel coding for high-speed links: A systematic look at code performance and system simulation Blitvic, Natasa Stojanovic, Vladimir Marko Lee, Maxine Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science Blitvic, Natasa Stojanovic, Vladimir Marko While channel coding is a standard method of improving a system's energy efficiency in digital communications, its practice does not extend to high-speed links. Increasing demands in network speeds are placing a large burden on the energy efficiency of high-speed links and render the benefit of channel coding for these systems a timely subject. The low error rates of interest and the presence of residual intersymbol interference (ISI) caused by hardware constraints impede the analysis and simulation of coded high-speed links. Focusing on the residual ISI and combined noise as the dominant error mechanisms, this paper analyzes error correlation through concepts of error region, channel signature, and correlation distance. This framework provides a deeper insight into joint error behaviors in high-speed links, extends the range of statistical simulation for coded high-speed links, and provides a case against the use of biased Monte Carlo methods in this setting. Finally, based on a hardware test bed, the performance of standard binary forward error correction and error detection schemes is evaluated, from which recommendations on coding for high-speed links are derived. 2012-09-20T19:40:02Z 2012-09-20T19:40:02Z 2009-05 2008-11 Article http://purl.org/eprint/type/JournalArticle 1521-3323 1557-9980 http://hdl.handle.net/1721.1/73087 Blitvic, Natasa, Maxine Lee, and Vladimir Stojanovic. “Channel Coding For High-Speed Links: A Systematic Look at Code Performance and System Simulation.” IEEE Transactions on Advanced Packaging 32.2 (2009): 268–279. © Copyright 2009 IEEE en_US http://dx.doi.org/ 10.1109/TADVP.2009.2015283 IEEE Transactions on Advanced Packaging Article is made available in accordance with the publisher's policy and may be subject to US copyright law. Please refer to the publisher's site for terms of use. application/pdf Institute of Electrical and Electronics Engineers (IEEE) IEEE |
| spellingShingle | Blitvic, Natasa Stojanovic, Vladimir Marko Lee, Maxine Channel coding for high-speed links: A systematic look at code performance and system simulation |
| title | Channel coding for high-speed links: A systematic look at code performance and system simulation |
| title_full | Channel coding for high-speed links: A systematic look at code performance and system simulation |
| title_fullStr | Channel coding for high-speed links: A systematic look at code performance and system simulation |
| title_full_unstemmed | Channel coding for high-speed links: A systematic look at code performance and system simulation |
| title_short | Channel coding for high-speed links: A systematic look at code performance and system simulation |
| title_sort | channel coding for high speed links a systematic look at code performance and system simulation |
| url | http://hdl.handle.net/1721.1/73087 |
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