High level compilation for gate reconfigurable architectures

High level compilation for gate reconfigurable architectures

Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2001.

Bibliographic Details
Main Author: Babb, Jonathan William
Other Authors: Anant Agarwal.
Format: Thesis
Language:eng
Published: Massachusetts Institute of Technology 2005
Subjects:
Electrical Engineering and Computer Science.
Online Access:http://hdl.handle.net/1721.1/8217

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