Floating-point unit (FPU) designs with nano-electromechanical (NEM) relays
Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2013.
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Format: | Thesis |
Language: | eng |
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Massachusetts Institute of Technology
2014
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Online Access: | http://hdl.handle.net/1721.1/84724 |
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author | Dutta, Sumit, Ph. D. Massachusetts Institute of Technology |
author2 | Vladimir Stojanović. |
author_facet | Vladimir Stojanović. Dutta, Sumit, Ph. D. Massachusetts Institute of Technology |
author_sort | Dutta, Sumit, Ph. D. Massachusetts Institute of Technology |
collection | MIT |
description | Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2013. |
first_indexed | 2024-09-23T15:06:23Z |
format | Thesis |
id | mit-1721.1/84724 |
institution | Massachusetts Institute of Technology |
language | eng |
last_indexed | 2024-09-23T15:06:23Z |
publishDate | 2014 |
publisher | Massachusetts Institute of Technology |
record_format | dspace |
spelling | mit-1721.1/847242019-04-11T10:56:17Z Floating-point unit (FPU) designs with nano-electromechanical (NEM) relays Floating-point unit designs with nano-electromechanical relays FPU designs with NEM relays Dutta, Sumit, Ph. D. Massachusetts Institute of Technology Vladimir Stojanović. Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science. Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science. Electrical Engineering and Computer Science. Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2013. This electronic version was submitted by the student author. The certified thesis is available in the Institute Archives and Special Collections. Includes bibliographical references (pages 71-74). Nano-electromechanical (NEM) relays are an alternative to CMOS transistors as the fabric of digital circuits. Circuits with NEM relays offer energy-efficiency benefits over CMOS since they have zero leakage power and are strategically designed to maintain throughput that is competitive with CMOS despite their slow actuation times. The floating-point unit (FPU) is the most complex arithmetic unit in a computational system. This thesis investigates if the energy-efficiency promise of NEM relays demonstrated before on smaller circuit blocks holds for complex computational structures such as the FPU. The energy, performance, and area trade-offs of FPU designs with NEM relays are examined and compared with that of state-of-the-art CMOS designs in an equivalent scaled process. Circuits that are critical path bottlenecks, including primarily the leading zero detector (LZD) and leading zero anticipator (LZA) blocks, are carefully identified and optimized for low latency and device count. We manage to drop the NEM relay FPU latency from 71 mechanical delays in a CMOS-style implementation to 16 mechanical delays in a NEM relay pass-logic style implementation. The FPU designed with NEM relays features 15x lower energy per operation compared to CMOS. by Sumit Dutta. S.M. 2014-02-10T13:33:56Z 2014-02-10T13:33:56Z 2013 Thesis http://hdl.handle.net/1721.1/84724 868993634 eng M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. http://dspace.mit.edu/handle/1721.1/7582 74 pages application/pdf Massachusetts Institute of Technology |
spellingShingle | Electrical Engineering and Computer Science. Dutta, Sumit, Ph. D. Massachusetts Institute of Technology Floating-point unit (FPU) designs with nano-electromechanical (NEM) relays |
title | Floating-point unit (FPU) designs with nano-electromechanical (NEM) relays |
title_full | Floating-point unit (FPU) designs with nano-electromechanical (NEM) relays |
title_fullStr | Floating-point unit (FPU) designs with nano-electromechanical (NEM) relays |
title_full_unstemmed | Floating-point unit (FPU) designs with nano-electromechanical (NEM) relays |
title_short | Floating-point unit (FPU) designs with nano-electromechanical (NEM) relays |
title_sort | floating point unit fpu designs with nano electromechanical nem relays |
topic | Electrical Engineering and Computer Science. |
url | http://hdl.handle.net/1721.1/84724 |
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