Heracles: A Tool for Fast RTL-Based Design Space Exploration of Multicore Processors
This paper presents Heracles, an open-source, functional, parameterized, synthesizable multicore system toolkit. Such a multi/many-core design platform is a powerful and versatile research and teaching tool for architectural exploration and hardware-software co-design. The Heracles toolkit comprises...
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| 格式: | 文件 |
| 语言: | en_US |
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Association for Computing Machinery (ACM)
2014
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| 在线阅读: | http://hdl.handle.net/1721.1/86169 https://orcid.org/0000-0001-8253-7714 https://orcid.org/0000-0003-4301-1159 |
| _version_ | 1826198456126930944 |
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| author | Kinsy, Michel A. Pellauer, Michael Devadas, Srinivas |
| author2 | Lincoln Laboratory |
| author_facet | Lincoln Laboratory Kinsy, Michel A. Pellauer, Michael Devadas, Srinivas |
| author_sort | Kinsy, Michel A. |
| collection | MIT |
| description | This paper presents Heracles, an open-source, functional, parameterized, synthesizable multicore system toolkit. Such a multi/many-core design platform is a powerful and versatile research and teaching tool for architectural exploration and hardware-software co-design. The Heracles toolkit comprises the soft hardware (HDL) modules, application compiler, and graphical user interface. It is designed with a high degree of modularity to support fast exploration of future multicore processors of di erent topologies, routing schemes, processing elements (cores), and memory system organizations. It is a component-based framework with parameterized interfaces and strong emphasis on module reusability. The compiler toolchain is used to map C or C++ based applications onto the processing units. The GUI allows the user to quickly con gure and launch a system instance for easy factorial development and evaluation. Hardware modules are implemented in synthesizable Verilog and are FPGA platform independent. The Heracles tool is freely available under the open-source MIT license at: http://projects.csail.mit.edu/heracles |
| first_indexed | 2024-09-23T11:05:14Z |
| format | Article |
| id | mit-1721.1/86169 |
| institution | Massachusetts Institute of Technology |
| language | en_US |
| last_indexed | 2024-09-23T11:05:14Z |
| publishDate | 2014 |
| publisher | Association for Computing Machinery (ACM) |
| record_format | dspace |
| spelling | mit-1721.1/861692022-09-27T17:02:39Z Heracles: A Tool for Fast RTL-Based Design Space Exploration of Multicore Processors Kinsy, Michel A. Pellauer, Michael Devadas, Srinivas Lincoln Laboratory Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science Kinsy, Michel A. Devadas, Srinivas This paper presents Heracles, an open-source, functional, parameterized, synthesizable multicore system toolkit. Such a multi/many-core design platform is a powerful and versatile research and teaching tool for architectural exploration and hardware-software co-design. The Heracles toolkit comprises the soft hardware (HDL) modules, application compiler, and graphical user interface. It is designed with a high degree of modularity to support fast exploration of future multicore processors of di erent topologies, routing schemes, processing elements (cores), and memory system organizations. It is a component-based framework with parameterized interfaces and strong emphasis on module reusability. The compiler toolchain is used to map C or C++ based applications onto the processing units. The GUI allows the user to quickly con gure and launch a system instance for easy factorial development and evaluation. Hardware modules are implemented in synthesizable Verilog and are FPGA platform independent. The Heracles tool is freely available under the open-source MIT license at: http://projects.csail.mit.edu/heracles 2014-04-14T19:05:42Z 2014-04-14T19:05:42Z 2013-02 Article http://purl.org/eprint/type/ConferencePaper 9781450318877 http://hdl.handle.net/1721.1/86169 Michel A. Kinsy, Michael Pellauer, and Srinivas Devadas. 2013. Heracles: a tool for fast RTL-based design space exploration of multicore processors. In Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays (FPGA '13). ACM, New York, NY, USA, 125-134. https://orcid.org/0000-0001-8253-7714 https://orcid.org/0000-0003-4301-1159 en_US http://dx.doi.org/10.1145/2435264.2435287 Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays (FPGA '13) Creative Commons Attribution-Noncommercial-Share Alike http://creativecommons.org/licenses/by-nc-sa/4.0/ application/pdf Association for Computing Machinery (ACM) MIT web domain |
| spellingShingle | Kinsy, Michel A. Pellauer, Michael Devadas, Srinivas Heracles: A Tool for Fast RTL-Based Design Space Exploration of Multicore Processors |
| title | Heracles: A Tool for Fast RTL-Based Design Space Exploration of Multicore Processors |
| title_full | Heracles: A Tool for Fast RTL-Based Design Space Exploration of Multicore Processors |
| title_fullStr | Heracles: A Tool for Fast RTL-Based Design Space Exploration of Multicore Processors |
| title_full_unstemmed | Heracles: A Tool for Fast RTL-Based Design Space Exploration of Multicore Processors |
| title_short | Heracles: A Tool for Fast RTL-Based Design Space Exploration of Multicore Processors |
| title_sort | heracles a tool for fast rtl based design space exploration of multicore processors |
| url | http://hdl.handle.net/1721.1/86169 https://orcid.org/0000-0001-8253-7714 https://orcid.org/0000-0003-4301-1159 |
| work_keys_str_mv | AT kinsymichela heraclesatoolforfastrtlbaseddesignspaceexplorationofmulticoreprocessors AT pellauermichael heraclesatoolforfastrtlbaseddesignspaceexplorationofmulticoreprocessors AT devadassrinivas heraclesatoolforfastrtlbaseddesignspaceexplorationofmulticoreprocessors |