A low-power 32 bit datapath design
Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2000.
Main Author: | Heo, Seongmoo, 1977- |
---|---|
Other Authors: | Krste Asanović. |
Format: | Thesis |
Language: | eng |
Published: |
Massachusetts Institute of Technology
2014
|
Subjects: | |
Online Access: | http://hdl.handle.net/1721.1/86624 |
Similar Items
-
The design of low-power digital datapath circuits
by: Steinheider, Jeffrey L. (Jeffrey Lee), 1977-
Published: (2014) -
Exposing datapath elements to reduce microprocessor energy consumption
by: Hampton, Mark Jerome, 1977-
Published: (2005) -
Design and implementation of a low voltage micropower 16-bit asynchronous datapath for a low power asynchronous microprocessor
by: Chang, Khia Ho.
Published: (2008) -
Optimal digital system design in deep submicron technology
by: Heo, Seongmoo, 1977-
Published: (2007) -
Designing a congestion control plane datapath with QUIC
by: Raghavan, Deepti.
Published: (2019)