Design of a continuous-time bandpass delta-sigma modulator
Thesis: S.M., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2014.
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| Format: | Thesis |
| Language: | eng |
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Massachusetts Institute of Technology
2014
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| Online Access: | http://hdl.handle.net/1721.1/87939 |
| _version_ | 1826205191928545280 |
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| author | Yang, Xi, Ph. D. Massachusetts Institute of Technology |
| author2 | Hae-Seung Lee. |
| author_facet | Hae-Seung Lee. Yang, Xi, Ph. D. Massachusetts Institute of Technology |
| author_sort | Yang, Xi, Ph. D. Massachusetts Institute of Technology |
| collection | MIT |
| description | Thesis: S.M., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2014. |
| first_indexed | 2024-09-23T13:09:08Z |
| format | Thesis |
| id | mit-1721.1/87939 |
| institution | Massachusetts Institute of Technology |
| language | eng |
| last_indexed | 2024-09-23T13:09:08Z |
| publishDate | 2014 |
| publisher | Massachusetts Institute of Technology |
| record_format | dspace |
| spelling | mit-1721.1/879392020-03-31T14:44:14Z Design of a continuous-time bandpass delta-sigma modulator Design of a CT bandpass delta-sigma modulator / Yang, Xi, Ph. D. Massachusetts Institute of Technology Hae-Seung Lee. Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science. Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science Electrical Engineering and Computer Science. Thesis: S.M., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2014. Cataloged from PDF version of thesis. Includes bibliographical references (pages 103-105). An 8th-order continuous-time (CT) bandpass delta-sigma modulator has been designed and simulated in a 65 nm CMOS process. This modulator achieves in simulation 25 MHz signal bandwidth at 250 MHz center frequency with a signal-to- noise ratio (SNR) of 75.5 dB. The modulator samples at 1 GS/s while consuming 319 mW. On the system level, the feedback topology secures stability for the 8th-order system, achieving a maximum stable input range of -1.9 dBFS. A 2.5-V/1.2-V dual-supply loop filter with a feed-forward coupling path has been proposed to suppress noise and distortion. On the transistor level, a 5th -order dual-supply feed-forward operational amplifier (op amp) and a 4th-order single-supply feed-forward op amp have been designed to enable high modulator linearity and coefficient accuracy. by Xi Yang. S.M. 2014-06-13T22:34:38Z 2014-06-13T22:34:38Z 2014 2014 Thesis http://hdl.handle.net/1721.1/87939 880166778 eng M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. http://dspace.mit.edu/handle/1721.1/7582 105pages application/pdf Massachusetts Institute of Technology |
| spellingShingle | Electrical Engineering and Computer Science. Yang, Xi, Ph. D. Massachusetts Institute of Technology Design of a continuous-time bandpass delta-sigma modulator |
| title | Design of a continuous-time bandpass delta-sigma modulator |
| title_full | Design of a continuous-time bandpass delta-sigma modulator |
| title_fullStr | Design of a continuous-time bandpass delta-sigma modulator |
| title_full_unstemmed | Design of a continuous-time bandpass delta-sigma modulator |
| title_short | Design of a continuous-time bandpass delta-sigma modulator |
| title_sort | design of a continuous time bandpass delta sigma modulator |
| topic | Electrical Engineering and Computer Science. |
| url | http://hdl.handle.net/1721.1/87939 |
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