Reduced hardware transactions: a new approach to hybrid transactional memory
For many years, the accepted wisdom has been that the key to adoption of best-effort hardware transactions is to guarantee progress by combining them with an all software slow-path, to be taken if the hardware transactions fail repeatedly. However, all known generally applicable hybrid transactional...
Main Authors: | Matveev, Alexander, Shavit, Nir N. |
---|---|
Other Authors: | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science |
Format: | Article |
Language: | en_US |
Published: |
Association for Computing Machinery (ACM)
2014
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Online Access: | http://hdl.handle.net/1721.1/90886 https://orcid.org/0000-0002-4552-2414 |
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