Fast checkpoint and recovery techniques for an in-memory database
Thesis: M. Eng., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2014.
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| Other Authors: | |
| Format: | Thesis |
| Language: | eng |
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Massachusetts Institute of Technology
2014
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| Online Access: | http://hdl.handle.net/1721.1/91701 |
| _version_ | 1826213004314673152 |
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| author | Zheng, Wenting |
| author2 | Barbara Liskov. |
| author_facet | Barbara Liskov. Zheng, Wenting |
| author_sort | Zheng, Wenting |
| collection | MIT |
| description | Thesis: M. Eng., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2014. |
| first_indexed | 2024-09-23T15:41:34Z |
| format | Thesis |
| id | mit-1721.1/91701 |
| institution | Massachusetts Institute of Technology |
| language | eng |
| last_indexed | 2024-09-23T15:41:34Z |
| publishDate | 2014 |
| publisher | Massachusetts Institute of Technology |
| record_format | dspace |
| spelling | mit-1721.1/917012019-04-11T11:24:09Z Fast checkpoint and recovery techniques for an in-memory database Efficient checkpoint and recovery scheme in a fast in-memory database Zheng, Wenting Barbara Liskov. Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science. Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science. Electrical Engineering and Computer Science. Thesis: M. Eng., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2014. This electronic version was submitted by the student author. The certified thesis is available in the Institute Archives and Special Collections. Cataloged from student-submitted PDF version of thesis. Includes bibliographical references (pages 61-62). Multicore in-memory databases for modern machines can support extraordinarily high transaction rates for online transaction processing workloads. A potential weakness of such databases, however, is recovery from crash failures. We show that techniques for disk-based persistence can be ecient enough to keep up with current systems' huge memory sizes and fast transaction rates, be smart enough to avoid additional contention, and provide fast recovery. This thesis presents SiloR, a persistence system built for a very fast multicore database system called Silo. We show that naive logging and checkpoints make normal-case execution slower, but that careful design of the persistence system allows us to keep up with many workloads without negative impact on runtime performance. We design the checkpoint and logging system to utilize multicore's resources to its fullest extent, both during runtime and during recovery. Parallelism allows the system to recover fast. Experiments show that a large database (~~ 50 GB) can be recovered in under five minutes. by Wenting Zheng. M. Eng. 2014-11-24T16:16:33Z 2014-11-24T16:16:33Z 2014 2014 Thesis http://hdl.handle.net/1721.1/91701 894502502 eng M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. http://dspace.mit.edu/handle/1721.1/7582 62 pages application/pdf Massachusetts Institute of Technology |
| spellingShingle | Electrical Engineering and Computer Science. Zheng, Wenting Fast checkpoint and recovery techniques for an in-memory database |
| title | Fast checkpoint and recovery techniques for an in-memory database |
| title_full | Fast checkpoint and recovery techniques for an in-memory database |
| title_fullStr | Fast checkpoint and recovery techniques for an in-memory database |
| title_full_unstemmed | Fast checkpoint and recovery techniques for an in-memory database |
| title_short | Fast checkpoint and recovery techniques for an in-memory database |
| title_sort | fast checkpoint and recovery techniques for an in memory database |
| topic | Electrical Engineering and Computer Science. |
| url | http://hdl.handle.net/1721.1/91701 |
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