Test structure, circuits and extraction methods to determine the radius of infuence of STI and polysilicon pattern density

Advanced CMOS processes need new methodologies to extract, characterize and model process variations and their sources. Most prior studies have focused on understanding the effect of local layout features on transistor performance; limited work has been done to characterize medium-range (≈ 10μm to 2...

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Main Authors: Chang, Albert H., Zuo, Kewei, Wang, Jean, Yu, Douglas, Boning, Duane S.
Other Authors: Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Format: Article
Language:en_US
Published: Institute of Electrical and Electronics Engineers (IEEE) 2014
Online Access:http://hdl.handle.net/1721.1/92429
https://orcid.org/0000-0002-0417-445X
_version_ 1811097728382402560
author Chang, Albert H.
Zuo, Kewei
Wang, Jean
Yu, Douglas
Boning, Duane S.
author2 Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
author_facet Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Chang, Albert H.
Zuo, Kewei
Wang, Jean
Yu, Douglas
Boning, Duane S.
author_sort Chang, Albert H.
collection MIT
description Advanced CMOS processes need new methodologies to extract, characterize and model process variations and their sources. Most prior studies have focused on understanding the effect of local layout features on transistor performance; limited work has been done to characterize medium-range (≈ 10μm to 2mm) pattern density effects. We propose a new methodology to extract the radius of influence, or the range of neighboring layout that should be taken into account in determining transistor characteristics, for shallow trench isolation (STI) and polysilicon pattern density. A test chip, with 130k devices under test (DUTs) and step-like pattern density layout changes, is designed in 65nm bulk CMOS technology as a case study. The extraction result of the measured data suggests that the local layout geometry, within the DUT cell size of 6μm × 8μm, is the dominant contributor to systematic device variation. Across-die medium-range layout pattern densities are found to have a statistically significant and detectable effect, but this effect is small and contributes only 2-5% of the total variation in this technology.
first_indexed 2024-09-23T17:03:58Z
format Article
id mit-1721.1/92429
institution Massachusetts Institute of Technology
language en_US
last_indexed 2024-09-23T17:03:58Z
publishDate 2014
publisher Institute of Electrical and Electronics Engineers (IEEE)
record_format dspace
spelling mit-1721.1/924292022-09-29T23:25:57Z Test structure, circuits and extraction methods to determine the radius of infuence of STI and polysilicon pattern density Chang, Albert H. Zuo, Kewei Wang, Jean Yu, Douglas Boning, Duane S. Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science Massachusetts Institute of Technology. Microsystems Technology Laboratories Boning, Duane S. Chang, Albert H. Boning, Duane S. Advanced CMOS processes need new methodologies to extract, characterize and model process variations and their sources. Most prior studies have focused on understanding the effect of local layout features on transistor performance; limited work has been done to characterize medium-range (≈ 10μm to 2mm) pattern density effects. We propose a new methodology to extract the radius of influence, or the range of neighboring layout that should be taken into account in determining transistor characteristics, for shallow trench isolation (STI) and polysilicon pattern density. A test chip, with 130k devices under test (DUTs) and step-like pattern density layout changes, is designed in 65nm bulk CMOS technology as a case study. The extraction result of the measured data suggests that the local layout geometry, within the DUT cell size of 6μm × 8μm, is the dominant contributor to systematic device variation. Across-die medium-range layout pattern densities are found to have a statistically significant and detectable effect, but this effect is small and contributes only 2-5% of the total variation in this technology. 2014-12-22T15:11:09Z 2014-12-22T15:11:09Z 2012-03 Article http://purl.org/eprint/type/ConferencePaper 978-1-4673-1036-9 978-1-4673-1034-5 978-1-4673-1035-2 1948-3287 http://hdl.handle.net/1721.1/92429 Chang, Albert H., Kewei Zuo, Jean Wang, Douglas Yu, and Duane Boning. “Test Structure, Circuits and Extraction Methods to Determine the Radius of Infuence of STI and Polysilicon Pattern Density.” Thirteenth International Symposium on Quality Electronic Design (ISQED) (March 2012). https://orcid.org/0000-0002-0417-445X en_US http://dx.doi.org/10.1109/ISQED.2012.6187493 Proceedings of the Thirteenth International Symposium on Quality Electronic Design (ISQED) Creative Commons Attribution-Noncommercial-Share Alike http://creativecommons.org/licenses/by-nc-sa/4.0/ application/pdf Institute of Electrical and Electronics Engineers (IEEE) Boning
spellingShingle Chang, Albert H.
Zuo, Kewei
Wang, Jean
Yu, Douglas
Boning, Duane S.
Test structure, circuits and extraction methods to determine the radius of infuence of STI and polysilicon pattern density
title Test structure, circuits and extraction methods to determine the radius of infuence of STI and polysilicon pattern density
title_full Test structure, circuits and extraction methods to determine the radius of infuence of STI and polysilicon pattern density
title_fullStr Test structure, circuits and extraction methods to determine the radius of infuence of STI and polysilicon pattern density
title_full_unstemmed Test structure, circuits and extraction methods to determine the radius of infuence of STI and polysilicon pattern density
title_short Test structure, circuits and extraction methods to determine the radius of infuence of STI and polysilicon pattern density
title_sort test structure circuits and extraction methods to determine the radius of infuence of sti and polysilicon pattern density
url http://hdl.handle.net/1721.1/92429
https://orcid.org/0000-0002-0417-445X
work_keys_str_mv AT changalberth teststructurecircuitsandextractionmethodstodeterminetheradiusofinfuenceofstiandpolysiliconpatterndensity
AT zuokewei teststructurecircuitsandextractionmethodstodeterminetheradiusofinfuenceofstiandpolysiliconpatterndensity
AT wangjean teststructurecircuitsandextractionmethodstodeterminetheradiusofinfuenceofstiandpolysiliconpatterndensity
AT yudouglas teststructurecircuitsandextractionmethodstodeterminetheradiusofinfuenceofstiandpolysiliconpatterndensity
AT boningduanes teststructurecircuitsandextractionmethodstodeterminetheradiusofinfuenceofstiandpolysiliconpatterndensity