Test structure, circuits and extraction methods to determine the radius of infuence of STI and polysilicon pattern density
Advanced CMOS processes need new methodologies to extract, characterize and model process variations and their sources. Most prior studies have focused on understanding the effect of local layout features on transistor performance; limited work has been done to characterize medium-range (≈ 10μm to 2...
| Main Authors: | , , , , |
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| Other Authors: | |
| Format: | Article |
| Language: | en_US |
| Published: |
Institute of Electrical and Electronics Engineers (IEEE)
2014
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| Online Access: | http://hdl.handle.net/1721.1/92429 https://orcid.org/0000-0002-0417-445X |