Joint Algorithm-Architecture Optimization of CABAC
This paper uses joint algorithm and architecture design to enable high coding efficiency in conjunction with high processing speed and low area cost. Specifically, it presents several optimizations that can be performed on Context Adaptive Binary Arithmetic Coding (CABAC), a form of entropy coding u...
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| Other Authors: | |
| Format: | Article |
| Language: | en_US |
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Springer-Verlag
2015
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| Online Access: | http://hdl.handle.net/1721.1/92827 https://orcid.org/0000-0002-5977-2748 https://orcid.org/0000-0003-4841-3990 |
| _version_ | 1826206984242724864 |
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| author | Sze, Vivienne Chandrakasan, Anantha P. |
| author2 | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science |
| author_facet | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science Sze, Vivienne Chandrakasan, Anantha P. |
| author_sort | Sze, Vivienne |
| collection | MIT |
| description | This paper uses joint algorithm and architecture design to enable high coding efficiency in conjunction with high processing speed and low area cost. Specifically, it presents several optimizations that can be performed on Context Adaptive Binary Arithmetic Coding (CABAC), a form of entropy coding used in H.264/AVC, to achieve the throughput necessary for real-time low power high definition video coding. The combination of syntax element partitions and interleaved entropy slices, referred to as Massively Parallel CABAC, increases the number of binary symbols that can be processed in a cycle. Subinterval reordering is used to reduce the cycle time required to process each binary symbol. Under common conditions using the JM12.0 software, the Massively Parallel CABAC, increases the bins per cycle by 2.7 to 32.8× at a cost of 0.25 to 6.84% coding loss compared with sequential single slice H.264/AVC CABAC. It also provides a 2× reduction in area cost, and reduces memory bandwidth. Subinterval reordering reduces the critical path delay by 14 to 22%, while modifications to context selection reduces the memory requirement by 67%. This work demonstrates that accounting for implementation cost during video coding algorithms design can enable higher processing speed and reduce hardware cost, while still delivering high coding efficiency in the next generation video coding standard. |
| first_indexed | 2024-09-23T13:41:58Z |
| format | Article |
| id | mit-1721.1/92827 |
| institution | Massachusetts Institute of Technology |
| language | en_US |
| last_indexed | 2024-09-23T13:41:58Z |
| publishDate | 2015 |
| publisher | Springer-Verlag |
| record_format | dspace |
| spelling | mit-1721.1/928272022-09-28T15:35:37Z Joint Algorithm-Architecture Optimization of CABAC Sze, Vivienne Chandrakasan, Anantha P. Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science Sze, Vivienne Sze, Vivienne Chandrakasan, Anantha P. This paper uses joint algorithm and architecture design to enable high coding efficiency in conjunction with high processing speed and low area cost. Specifically, it presents several optimizations that can be performed on Context Adaptive Binary Arithmetic Coding (CABAC), a form of entropy coding used in H.264/AVC, to achieve the throughput necessary for real-time low power high definition video coding. The combination of syntax element partitions and interleaved entropy slices, referred to as Massively Parallel CABAC, increases the number of binary symbols that can be processed in a cycle. Subinterval reordering is used to reduce the cycle time required to process each binary symbol. Under common conditions using the JM12.0 software, the Massively Parallel CABAC, increases the bins per cycle by 2.7 to 32.8× at a cost of 0.25 to 6.84% coding loss compared with sequential single slice H.264/AVC CABAC. It also provides a 2× reduction in area cost, and reduces memory bandwidth. Subinterval reordering reduces the critical path delay by 14 to 22%, while modifications to context selection reduces the memory requirement by 67%. This work demonstrates that accounting for implementation cost during video coding algorithms design can enable higher processing speed and reduce hardware cost, while still delivering high coding efficiency in the next generation video coding standard. Texas Instruments Incorporated (Graduate Women's Fellowship for Leadership in Microelectronics) Natural Sciences and Engineering Research Council of Canada 2015-01-13T18:23:52Z 2015-01-13T18:23:52Z 2012-05 2012-03 Article http://purl.org/eprint/type/JournalArticle 1939-8018 1939-8115 http://hdl.handle.net/1721.1/92827 Sze, Vivienne, and Anantha P. Chandrakasan. “Joint Algorithm-Architecture Optimization of CABAC.” Journal of Signal Processing Systems 69, no. 3 (May 26, 2012): 239–252. https://orcid.org/0000-0002-5977-2748 https://orcid.org/0000-0003-4841-3990 en_US http://dx.doi.org/10.1007/s11265-012-0678-2 Journal of Signal Processing Systems Creative Commons Attribution-Noncommercial-Share Alike http://creativecommons.org/licenses/by-nc-sa/4.0/ application/pdf Springer-Verlag Sze |
| spellingShingle | Sze, Vivienne Chandrakasan, Anantha P. Joint Algorithm-Architecture Optimization of CABAC |
| title | Joint Algorithm-Architecture Optimization of CABAC |
| title_full | Joint Algorithm-Architecture Optimization of CABAC |
| title_fullStr | Joint Algorithm-Architecture Optimization of CABAC |
| title_full_unstemmed | Joint Algorithm-Architecture Optimization of CABAC |
| title_short | Joint Algorithm-Architecture Optimization of CABAC |
| title_sort | joint algorithm architecture optimization of cabac |
| url | http://hdl.handle.net/1721.1/92827 https://orcid.org/0000-0002-5977-2748 https://orcid.org/0000-0003-4841-3990 |
| work_keys_str_mv | AT szevivienne jointalgorithmarchitectureoptimizationofcabac AT chandrakasanananthap jointalgorithmarchitectureoptimizationofcabac |