Throughput analysis of input-queued packet switches : multicasting and speedup
Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1998.
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| Format: | Thesis |
| Language: | eng |
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Massachusetts Institute of Technology
2005
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| Online Access: | http://hdl.handle.net/1721.1/9627 |
| _version_ | 1826199441173905408 |
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| author | Maruta, Toru, 1967- |
| author2 | Balaji Prabhakar. |
| author_facet | Balaji Prabhakar. Maruta, Toru, 1967- |
| author_sort | Maruta, Toru, 1967- |
| collection | MIT |
| description | Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1998. |
| first_indexed | 2024-09-23T11:19:57Z |
| format | Thesis |
| id | mit-1721.1/9627 |
| institution | Massachusetts Institute of Technology |
| language | eng |
| last_indexed | 2024-09-23T11:19:57Z |
| publishDate | 2005 |
| publisher | Massachusetts Institute of Technology |
| record_format | dspace |
| spelling | mit-1721.1/96272020-07-14T22:12:20Z Throughput analysis of input-queued packet switches : multicasting and speedup Maruta, Toru, 1967- Balaji Prabhakar. Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science Electrical Engineering and Computer Science Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1998. Includes bibliographical references (p. 75-76). The widespread use of new applications such as voice/video streaming, the WWW, and the MBone has caused an increased demand for bandwidth in the Internet. In response to this, Internet backbone speeds have increased to several gigabits/sec, thus causing packet switches and routers to become potential bottlenecks of the network. There is also an increasing need to support services with different QoS requirements over a single integrated network. The support of such capabilities will require an even higher performance of packet switches and routers. Among several competing high-speed router architectures, those based on a crossbar backplane have become the most widely used by the industry. Essentially, crossbar architectures come in two flavors: (1) The Output-queued Architecture, and (2) The Input-queued Architecture. Despite superior throughput and delay performance, the output-queued architecture is severely impacted by memory bandwidth constraints at high speeds. On the other hand, input-queued switches/routers do not suffer from this, but deliver a poor throughput and delay performance due to the so-called Head of Line (HOL) blocking problem. Therefore, a number of recent studies have focused on overcoming the limitations of input-queued switches through the use of "speedup" and clever packet scheduling algorithms. Research on designing efficient switches for multicast traffic is also of great interest currently, since multicast traffic is a growing proportion of Internet traffic. In this thesis, we revisit the analysis of input-queued switches. Our contribution consists of the use of a conceptual combinatorial model of "balls and urns" to formulate and analyze the behavior of input-queued switches both with and without speedup. We also analyze the throughput performance of multicast switches when the fanout is deterministic, and obtain precise analytical results which exactly match simulations. Finally we analyze the throughput of multicast switches when the fanout is random and find, somewhat surprisingly, that the throughput is lowest when the fanout is deterministic. by Toru Maruta. S.M. 2005-08-19T19:02:28Z 2005-08-19T19:02:28Z 1998 1998 Thesis http://hdl.handle.net/1721.1/9627 42306218 eng M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. http://dspace.mit.edu/handle/1721.1/7582 76 p. 4027574 bytes 4027333 bytes application/pdf application/pdf application/pdf Massachusetts Institute of Technology |
| spellingShingle | Electrical Engineering and Computer Science Maruta, Toru, 1967- Throughput analysis of input-queued packet switches : multicasting and speedup |
| title | Throughput analysis of input-queued packet switches : multicasting and speedup |
| title_full | Throughput analysis of input-queued packet switches : multicasting and speedup |
| title_fullStr | Throughput analysis of input-queued packet switches : multicasting and speedup |
| title_full_unstemmed | Throughput analysis of input-queued packet switches : multicasting and speedup |
| title_short | Throughput analysis of input-queued packet switches : multicasting and speedup |
| title_sort | throughput analysis of input queued packet switches multicasting and speedup |
| topic | Electrical Engineering and Computer Science |
| url | http://hdl.handle.net/1721.1/9627 |
| work_keys_str_mv | AT marutatoru1967 throughputanalysisofinputqueuedpacketswitchesmulticastingandspeedup |