Circuit level synthesis for delta-sigma converters
Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1999.
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| Format: | Thesis |
| Language: | eng |
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Massachusetts Institute of Technology
2005
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| Online Access: | http://hdl.handle.net/1721.1/9722 |
| _version_ | 1811096807704363008 |
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| author | Peng, Mark Shane, 1975- |
| author2 | Hae-Seung Lee. |
| author_facet | Hae-Seung Lee. Peng, Mark Shane, 1975- |
| author_sort | Peng, Mark Shane, 1975- |
| collection | MIT |
| description | Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1999. |
| first_indexed | 2024-09-23T16:49:19Z |
| format | Thesis |
| id | mit-1721.1/9722 |
| institution | Massachusetts Institute of Technology |
| language | eng |
| last_indexed | 2024-09-23T16:49:19Z |
| publishDate | 2005 |
| publisher | Massachusetts Institute of Technology |
| record_format | dspace |
| spelling | mit-1721.1/97222020-07-14T22:02:17Z Circuit level synthesis for delta-sigma converters Peng, Mark Shane, 1975- Hae-Seung Lee. Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science Electrical Engineering and Computer Science Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1999. Includes bibliographical references (p. 65-66). Analog circuit design is a relatively complicated art that requires a high degree of erudition in the field. With this in mind, this thesis presents work on an analog circuit synthesis tool to minimize analog circuit design time. Specifically, the author has designed and implemented a discrete-time, one-bit, oversampling delta-sigma analog-to-digital modulator circuit synthesis tool in MATLAB script. With the parameters of center frequency, loop order, oversampling ratio, and minimum capacitor size, a user can utilize the program to generate a semi-optimized transistor level description of the modulator that can subsequently he used in SPICE. Parlaying Richard Schreier's work on a delta-sigma toolbox for MATLAB, the switched capacitor circuit contains robustly generated differential operational amplifiers and comparators. Furthermore, switched capacitors are scaled for minimal kT/C noise while switch sizes are synchronously adjusted to accommodate these values. Results of the SPICE simulations of the generated circuits compare favorably with the behaviorally predicted results. by Mark Shane Peng. S.M. 2005-08-19T19:43:18Z 2005-08-19T19:43:18Z 1999 1999 Thesis http://hdl.handle.net/1721.1/9722 42678916 eng M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. http://dspace.mit.edu/handle/1721.1/7582 66 leaves 4001552 bytes 4001311 bytes application/pdf application/pdf application/pdf Massachusetts Institute of Technology |
| spellingShingle | Electrical Engineering and Computer Science Peng, Mark Shane, 1975- Circuit level synthesis for delta-sigma converters |
| title | Circuit level synthesis for delta-sigma converters |
| title_full | Circuit level synthesis for delta-sigma converters |
| title_fullStr | Circuit level synthesis for delta-sigma converters |
| title_full_unstemmed | Circuit level synthesis for delta-sigma converters |
| title_short | Circuit level synthesis for delta-sigma converters |
| title_sort | circuit level synthesis for delta sigma converters |
| topic | Electrical Engineering and Computer Science |
| url | http://hdl.handle.net/1721.1/9722 |
| work_keys_str_mv | AT pengmarkshane1975 circuitlevelsynthesisfordeltasigmaconverters |