Low-energy and area-efficient tri-level switching scheme for SAR ADC
A novel low-energy tri-level switching scheme for low-power successive approximation register (SAR) ADC is proposed. With the input common-mode voltage (Vcm) designed to be exactly half of the reference voltage (Vref ), the switching energy of the proposed switching scheme is reduced by 96.89% a...
Main Authors: | , |
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Format: | Journal Article |
Language: | English |
Published: |
2013
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Online Access: | https://hdl.handle.net/10356/100633 http://hdl.handle.net/10220/13270 |
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author | Yuan, C. Lam, Y. |
author2 | School of Electrical and Electronic Engineering |
author_facet | School of Electrical and Electronic Engineering Yuan, C. Lam, Y. |
author_sort | Yuan, C. |
collection | NTU |
description | A novel low-energy tri-level switching scheme for low-power successive
approximation register (SAR) ADC is proposed. With the input
common-mode voltage (Vcm) designed to be exactly half of the reference
voltage (Vref ), the switching energy of the proposed switching
scheme is reduced by 96.89% as compared with the conventional architecture.
Besides the large energy saving, the proposed switching
scheme also reduces the number of capacitors in the ADC capacitor
array by 75%, which in turn results in an area-efficient SAR ADC. |
first_indexed | 2024-10-01T04:34:22Z |
format | Journal Article |
id | ntu-10356/100633 |
institution | Nanyang Technological University |
language | English |
last_indexed | 2024-10-01T04:34:22Z |
publishDate | 2013 |
record_format | dspace |
spelling | ntu-10356/1006332020-03-07T14:00:30Z Low-energy and area-efficient tri-level switching scheme for SAR ADC Yuan, C. Lam, Y. School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering A novel low-energy tri-level switching scheme for low-power successive approximation register (SAR) ADC is proposed. With the input common-mode voltage (Vcm) designed to be exactly half of the reference voltage (Vref ), the switching energy of the proposed switching scheme is reduced by 96.89% as compared with the conventional architecture. Besides the large energy saving, the proposed switching scheme also reduces the number of capacitors in the ADC capacitor array by 75%, which in turn results in an area-efficient SAR ADC. 2013-08-29T08:08:42Z 2019-12-06T20:25:42Z 2013-08-29T08:08:42Z 2019-12-06T20:25:42Z 2012 2012 Journal Article Yuan, C.,& Lam, Y. (2012). Low-energy and area-efficient tri-level switching scheme for SAR ADC. Electronics Letters, 48(9), 482. 0013-5194 https://hdl.handle.net/10356/100633 http://hdl.handle.net/10220/13270 10.1049/el.2011.4001 en Electronics letters |
spellingShingle | DRNTU::Engineering::Electrical and electronic engineering Yuan, C. Lam, Y. Low-energy and area-efficient tri-level switching scheme for SAR ADC |
title | Low-energy and area-efficient tri-level switching scheme for SAR ADC |
title_full | Low-energy and area-efficient tri-level switching scheme for SAR ADC |
title_fullStr | Low-energy and area-efficient tri-level switching scheme for SAR ADC |
title_full_unstemmed | Low-energy and area-efficient tri-level switching scheme for SAR ADC |
title_short | Low-energy and area-efficient tri-level switching scheme for SAR ADC |
title_sort | low energy and area efficient tri level switching scheme for sar adc |
topic | DRNTU::Engineering::Electrical and electronic engineering |
url | https://hdl.handle.net/10356/100633 http://hdl.handle.net/10220/13270 |
work_keys_str_mv | AT yuanc lowenergyandareaefficienttrilevelswitchingschemeforsaradc AT lamy lowenergyandareaefficienttrilevelswitchingschemeforsaradc |