Design, fabrication, and characterization of three-dimensional embedded capacitor in through-silicon via
In this thesis, a novel integrated capacitor, called “three-dimensional (3-D) embedded capacitor” is proposed, designed, fabricated, and characterized for application in integrated circuits (ICs) with through-silicon vias (TSVs). A significant capacitance density enhancement can be achieved for this...
Main Author: | Lin, Ye |
---|---|
Other Authors: | Tan Chuan Seng |
Format: | Thesis |
Language: | English |
Published: |
2019
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Subjects: | |
Online Access: | https://hdl.handle.net/10356/102666 http://hdl.handle.net/10220/48586 |
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