The integration of InGaP LEDs with CMOS on 200 mm silicon wafers
The integration of photonics and electronics on a converged silicon CMOS platform is a long pursuit goal for both academe and industry. We have been developing technologies that can integrate III-V compound semiconductors and CMOS circuits on 200 mm silicon wafers. As an example we present our work...
| Main Authors: | , , , , , , , , , , , |
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| Other Authors: | |
| Format: | Journal Article |
| Language: | English |
| Published: |
2019
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| Online Access: | https://hdl.handle.net/10356/105701 http://hdl.handle.net/10220/49553 http://dx.doi.org/10.1117/12.2252030 |
| _version_ | 1826127821986070528 |
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| author | Wang, Bing Lee, Kwang Hong Wang, Cong Wang, Yue Made, Riko I. Sasangka, Wardhana Aji Nguyen, Viet Cuong Lee, Kenneth Eng Kian Tan, Chuan Seng Yoon, Soon Fatt Fitzgerald, Eugene A. Michel, Jurgen |
| author2 | Eldada, Louay A. |
| author_facet | Eldada, Louay A. Wang, Bing Lee, Kwang Hong Wang, Cong Wang, Yue Made, Riko I. Sasangka, Wardhana Aji Nguyen, Viet Cuong Lee, Kenneth Eng Kian Tan, Chuan Seng Yoon, Soon Fatt Fitzgerald, Eugene A. Michel, Jurgen |
| author_sort | Wang, Bing |
| collection | NTU |
| description | The integration of photonics and electronics on a converged silicon CMOS platform is a long pursuit goal for both academe and industry. We have been developing technologies that can integrate III-V compound semiconductors and CMOS circuits on 200 mm silicon wafers. As an example we present our work on the integration of InGaP light-emitting diodes (LEDs) with CMOS. The InGaP LEDs were epitaxially grown on high-quality GaAs and Ge buffers on 200 mm (100) silicon wafers in a MOCVD reactor. Strain engineering was applied to control the wafer bow that is induced by the mismatch of coefficients of thermal expansion between III-V films and silicon substrate. Wafer bonding was used to transfer the foundry-made silicon CMOS wafers to the InGaP LED wafers. Process trenches were opened on the CMOS layer to expose the underneath III-V device layers for LED processing. We show the issues encountered in the 200 mm processing and the methods we have been developing to overcome the problems. |
| first_indexed | 2024-10-01T07:15:05Z |
| format | Journal Article |
| id | ntu-10356/105701 |
| institution | Nanyang Technological University |
| language | English |
| last_indexed | 2024-10-01T07:15:05Z |
| publishDate | 2019 |
| record_format | dspace |
| spelling | ntu-10356/1057012019-12-06T21:56:07Z The integration of InGaP LEDs with CMOS on 200 mm silicon wafers Wang, Bing Lee, Kwang Hong Wang, Cong Wang, Yue Made, Riko I. Sasangka, Wardhana Aji Nguyen, Viet Cuong Lee, Kenneth Eng Kian Tan, Chuan Seng Yoon, Soon Fatt Fitzgerald, Eugene A. Michel, Jurgen Eldada, Louay A. Lee, El-Hang He, Sailing School of Electrical and Electronic Engineering SPIE OPTO Engineering::Electrical and electronic engineering InGaP LED CMOS Integration The integration of photonics and electronics on a converged silicon CMOS platform is a long pursuit goal for both academe and industry. We have been developing technologies that can integrate III-V compound semiconductors and CMOS circuits on 200 mm silicon wafers. As an example we present our work on the integration of InGaP light-emitting diodes (LEDs) with CMOS. The InGaP LEDs were epitaxially grown on high-quality GaAs and Ge buffers on 200 mm (100) silicon wafers in a MOCVD reactor. Strain engineering was applied to control the wafer bow that is induced by the mismatch of coefficients of thermal expansion between III-V films and silicon substrate. Wafer bonding was used to transfer the foundry-made silicon CMOS wafers to the InGaP LED wafers. Process trenches were opened on the CMOS layer to expose the underneath III-V device layers for LED processing. We show the issues encountered in the 200 mm processing and the methods we have been developing to overcome the problems. Published version 2019-08-06T05:58:59Z 2019-12-06T21:56:07Z 2019-08-06T05:58:59Z 2019-12-06T21:56:07Z 2017 Journal Article Wang, B., Lee, K. H., Wang, C., Wang, Y., Made, R. I., Sasangka, W. A., . . . Michel, J. (2017). The integration of InGaP LEDs with CMOS on 200 mm silicon wafers. Proceedings of SPIE - Smart Photonic and Optoelectronic Integrated Circuits XIX, 10107, 101070Y-. doi:10.1117/12.2252030 https://hdl.handle.net/10356/105701 http://hdl.handle.net/10220/49553 http://dx.doi.org/10.1117/12.2252030 en Proceedings of SPIE - Smart Photonic and Optoelectronic Integrated Circuits XIX © 2017 SPIE. All rights reserved. This paper was published in Proceedings of SPIE - Smart Photonic and Optoelectronic Integrated Circuits XIX and is made available with permission of SPIE. 8 p. application/pdf |
| spellingShingle | Engineering::Electrical and electronic engineering InGaP LED CMOS Integration Wang, Bing Lee, Kwang Hong Wang, Cong Wang, Yue Made, Riko I. Sasangka, Wardhana Aji Nguyen, Viet Cuong Lee, Kenneth Eng Kian Tan, Chuan Seng Yoon, Soon Fatt Fitzgerald, Eugene A. Michel, Jurgen The integration of InGaP LEDs with CMOS on 200 mm silicon wafers |
| title | The integration of InGaP LEDs with CMOS on 200 mm silicon wafers |
| title_full | The integration of InGaP LEDs with CMOS on 200 mm silicon wafers |
| title_fullStr | The integration of InGaP LEDs with CMOS on 200 mm silicon wafers |
| title_full_unstemmed | The integration of InGaP LEDs with CMOS on 200 mm silicon wafers |
| title_short | The integration of InGaP LEDs with CMOS on 200 mm silicon wafers |
| title_sort | integration of ingap leds with cmos on 200 mm silicon wafers |
| topic | Engineering::Electrical and electronic engineering InGaP LED CMOS Integration |
| url | https://hdl.handle.net/10356/105701 http://hdl.handle.net/10220/49553 http://dx.doi.org/10.1117/12.2252030 |
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