A fast and compact circuit for integer square root computation based on Mitchell logarithmic method
A novel non-iterative circuit for computing integer square root based on logarithm is proposed in the paper. Mitchell's methods are used for the logarithmic and antilogarithmic conversions. The proposed method merges two conversion stages into a single one to achieve better accuracy with a comp...
| Main Authors: | , , , , |
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| Other Authors: | |
| Format: | Conference Paper |
| Language: | English |
| Published: |
2013
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| Subjects: | |
| Online Access: | https://hdl.handle.net/10356/106483 http://hdl.handle.net/10220/17744 http://dx.doi.org/10.1109/ISCAS.2012.6271459 |
| _version_ | 1811691273546891264 |
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| author | Low, Joshua Yung Lih Jong, Ching Chuen Low, Jeremy Yung Shern Tay, Thian Fatt Chang, Chip Hong |
| author2 | School of Electrical and Electronic Engineering |
| author_facet | School of Electrical and Electronic Engineering Low, Joshua Yung Lih Jong, Ching Chuen Low, Jeremy Yung Shern Tay, Thian Fatt Chang, Chip Hong |
| author_sort | Low, Joshua Yung Lih |
| collection | NTU |
| description | A novel non-iterative circuit for computing integer square root based on logarithm is proposed in the paper. Mitchell's methods are used for the logarithmic and antilogarithmic conversions. The proposed method merges two conversion stages into a single one to achieve better accuracy with a compact architecture. Hence, the circuit size and latency are reduced. Compared to an existing design based on the modified Dijkstra algorithm used in a coherent receiver, the proposed design is either 8 times smaller or 9 times faster for 16-bit integer input. |
| first_indexed | 2024-10-01T06:17:16Z |
| format | Conference Paper |
| id | ntu-10356/106483 |
| institution | Nanyang Technological University |
| language | English |
| last_indexed | 2024-10-01T06:17:16Z |
| publishDate | 2013 |
| record_format | dspace |
| spelling | ntu-10356/1064832019-12-06T22:12:49Z A fast and compact circuit for integer square root computation based on Mitchell logarithmic method Low, Joshua Yung Lih Jong, Ching Chuen Low, Jeremy Yung Shern Tay, Thian Fatt Chang, Chip Hong School of Electrical and Electronic Engineering IEEE International Symposium on Circuits and Systems (2012 : Seoul, Korea) DRNTU::Engineering::Electrical and electronic engineering A novel non-iterative circuit for computing integer square root based on logarithm is proposed in the paper. Mitchell's methods are used for the logarithmic and antilogarithmic conversions. The proposed method merges two conversion stages into a single one to achieve better accuracy with a compact architecture. Hence, the circuit size and latency are reduced. Compared to an existing design based on the modified Dijkstra algorithm used in a coherent receiver, the proposed design is either 8 times smaller or 9 times faster for 16-bit integer input. 2013-11-15T07:58:24Z 2019-12-06T22:12:49Z 2013-11-15T07:58:24Z 2019-12-06T22:12:49Z 2012 2012 Conference Paper Low, J. Y. L., Jong, C. C., Low, J. Y. S., Tay, T. F., & Chang, C. H. (2012). A fast and compact circuit for integer square root computation based on Mitchell logarithmic method. 2012 IEEE International Symposium on Circuits and Systems(ISCAS), 1235-1238. https://hdl.handle.net/10356/106483 http://hdl.handle.net/10220/17744 http://dx.doi.org/10.1109/ISCAS.2012.6271459 en |
| spellingShingle | DRNTU::Engineering::Electrical and electronic engineering Low, Joshua Yung Lih Jong, Ching Chuen Low, Jeremy Yung Shern Tay, Thian Fatt Chang, Chip Hong A fast and compact circuit for integer square root computation based on Mitchell logarithmic method |
| title | A fast and compact circuit for integer square root computation based on Mitchell logarithmic method |
| title_full | A fast and compact circuit for integer square root computation based on Mitchell logarithmic method |
| title_fullStr | A fast and compact circuit for integer square root computation based on Mitchell logarithmic method |
| title_full_unstemmed | A fast and compact circuit for integer square root computation based on Mitchell logarithmic method |
| title_short | A fast and compact circuit for integer square root computation based on Mitchell logarithmic method |
| title_sort | fast and compact circuit for integer square root computation based on mitchell logarithmic method |
| topic | DRNTU::Engineering::Electrical and electronic engineering |
| url | https://hdl.handle.net/10356/106483 http://hdl.handle.net/10220/17744 http://dx.doi.org/10.1109/ISCAS.2012.6271459 |
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