A 10-bit 300 MS/s 5.8 mW SAR ADC with two-stage interpolation for PET imaging

In this paper, a high speed low power 2b/cycle successive approximation register (SAR) analog-To-digital converter (ADC) is proposed for medical imaging. The ADC adopts a two-stage differential pair based interpolation technique that can reduce resolution of the capacitive DAC and avoid usage of sma...

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Main Authors: Qiu, Lei, Wang, Keping, Tang, Kai, Siek, Liter, Zheng, Yuanjin
Other Authors: School of Electrical and Electronic Engineering
Format: Journal Article
Language:English
Published: 2020
Subjects:
Online Access:https://hdl.handle.net/10356/137073
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author Qiu, Lei
Wang, Keping
Tang, Kai
Siek, Liter
Zheng, Yuanjin
author2 School of Electrical and Electronic Engineering
author_facet School of Electrical and Electronic Engineering
Qiu, Lei
Wang, Keping
Tang, Kai
Siek, Liter
Zheng, Yuanjin
author_sort Qiu, Lei
collection NTU
description In this paper, a high speed low power 2b/cycle successive approximation register (SAR) analog-To-digital converter (ADC) is proposed for medical imaging. The ADC adopts a two-stage differential pair based interpolation technique that can reduce resolution of the capacitive DAC and avoid usage of smaller unit capacitor. A meta-stability immunity technique is proposed to enhance the asynchronous conversion. A design example of 10-bit 2b/cycle SAR ADC with sampling rate up to 300 MS/s is fabricated. Dissipating 5.8 mW with 1.2 V supply and occupying an active area of 0.082 mm2, the measured SFDR and SNDR at Nyquist input are 59-dB and 51.5-dB respectively. It achieves an effective resolution bandwidth of 360 MHz and a figure-of-merit of 61fJ/conversion-step.
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spelling ntu-10356/1370732020-02-19T02:38:52Z A 10-bit 300 MS/s 5.8 mW SAR ADC with two-stage interpolation for PET imaging Qiu, Lei Wang, Keping Tang, Kai Siek, Liter Zheng, Yuanjin School of Electrical and Electronic Engineering Engineering::Electrical and electronic engineering Interpolation Medical Imaging In this paper, a high speed low power 2b/cycle successive approximation register (SAR) analog-To-digital converter (ADC) is proposed for medical imaging. The ADC adopts a two-stage differential pair based interpolation technique that can reduce resolution of the capacitive DAC and avoid usage of smaller unit capacitor. A meta-stability immunity technique is proposed to enhance the asynchronous conversion. A design example of 10-bit 2b/cycle SAR ADC with sampling rate up to 300 MS/s is fabricated. Dissipating 5.8 mW with 1.2 V supply and occupying an active area of 0.082 mm2, the measured SFDR and SNDR at Nyquist input are 59-dB and 51.5-dB respectively. It achieves an effective resolution bandwidth of 360 MHz and a figure-of-merit of 61fJ/conversion-step. Accepted version 2020-02-19T02:25:15Z 2020-02-19T02:25:15Z 2018 Journal Article Qiu, L., Wang, K., Tang, K., Siek, L., & Zheng, Y. (2018). A 10-bit 300 MS/s 5.8 mW SAR ADC With two-stage interpolation for PET Imaging. IEEE Sensors Journal, 18(5), 2006-2014. doi:10.1109/JSEN.2018.2790581 1530-437X https://hdl.handle.net/10356/137073 10.1109/JSEN.2018.2790581 2-s2.0-85041219041 5 18 2006 2014 en IEEE Sensors Journal © 2018 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. The published version is available at: https://doi.org/10.1109/JSEN.2018.2790581. application/pdf
spellingShingle Engineering::Electrical and electronic engineering
Interpolation
Medical Imaging
Qiu, Lei
Wang, Keping
Tang, Kai
Siek, Liter
Zheng, Yuanjin
A 10-bit 300 MS/s 5.8 mW SAR ADC with two-stage interpolation for PET imaging
title A 10-bit 300 MS/s 5.8 mW SAR ADC with two-stage interpolation for PET imaging
title_full A 10-bit 300 MS/s 5.8 mW SAR ADC with two-stage interpolation for PET imaging
title_fullStr A 10-bit 300 MS/s 5.8 mW SAR ADC with two-stage interpolation for PET imaging
title_full_unstemmed A 10-bit 300 MS/s 5.8 mW SAR ADC with two-stage interpolation for PET imaging
title_short A 10-bit 300 MS/s 5.8 mW SAR ADC with two-stage interpolation for PET imaging
title_sort 10 bit 300 ms s 5 8 mw sar adc with two stage interpolation for pet imaging
topic Engineering::Electrical and electronic engineering
Interpolation
Medical Imaging
url https://hdl.handle.net/10356/137073
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