A fast approach for generating efficient parsers on FPGAs

The development of modern networking requires that high-performance network processors be designed quickly and efficiently to support new protocols. As a very important part of the processor, the parser parses the headers of the packets-this is the precondition for further processing and finally for...

Täydet tiedot

Bibliografiset tiedot
Päätekijät: Cao, Zhuang, Zhang, Huiguo, Li, Junnan, Wen, Mei, Zhang, Chunyuan
Muut tekijät: School of Computer Science and Engineering
Aineistotyyppi: Journal Article
Kieli:English
Julkaistu: 2020
Aiheet:
Linkit:https://hdl.handle.net/10356/142820

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