A fast approach for generating efficient parsers on FPGAs
The development of modern networking requires that high-performance network processors be designed quickly and efficiently to support new protocols. As a very important part of the processor, the parser parses the headers of the packets-this is the precondition for further processing and finally for...
Päätekijät: | Cao, Zhuang, Zhang, Huiguo, Li, Junnan, Wen, Mei, Zhang, Chunyuan |
---|---|
Muut tekijät: | School of Computer Science and Engineering |
Aineistotyyppi: | Journal Article |
Kieli: | English |
Julkaistu: |
2020
|
Aiheet: | |
Linkit: | https://hdl.handle.net/10356/142820 |
Samankaltaisia teoksia
-
PrismParser: A Framework for Implementing Efficient P4-Programmable Packet Parsers on FPGA
Tekijä: Parisa Mashreghi-Moghadam, et al.
Julkaistu: (2024-08-01) -
Matrix-based project dataset parsers
Tekijä: Zsolt T. Kosztyán, et al.
Julkaistu: (2024-12-01) -
Software-defined protocol independent parser based on FPGA
Tekijä: Lixin MIAO, et al.
Julkaistu: (2020-02-01) -
Propose a new approach for key generation based on Chicken Swarm Optimization and HTML Parser
Tekijä: Suhad Malalla, et al.
Julkaistu: (2020-08-01) -
Improving Persian Dependency-Based Parser Using Deep Learning
Tekijä: soghra lazemi, et al.
Julkaistu: (2022-06-01)