Electrical characteristics of three-dimensional metal-insulator-metal (3-D MIM) capacitor embedded in partially-filled Through-Silicon Via (TSV)
In this work, a new design of 3-D MIM capacitor embedded in partially-filled TSV is proposed and evaluated. The electrical characteristics of 3-D MIM capacitors confirm that the new design effectively mitigates the process-induced thermo-mechanical stress between TSV Cu core and the surrounding str...
| Main Authors: | , , |
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| Other Authors: | |
| Format: | Conference Paper |
| Language: | English |
| Published: |
2020
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| Subjects: | |
| Online Access: | https://hdl.handle.net/10356/144088 |
| _version_ | 1826125791796133888 |
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| author | Lin, Ye Li, Hong Yu Tan, Chuan Seng |
| author2 | School of Electrical and Electronic Engineering |
| author_facet | School of Electrical and Electronic Engineering Lin, Ye Li, Hong Yu Tan, Chuan Seng |
| author_sort | Lin, Ye |
| collection | NTU |
| description | In this work, a new design of 3-D MIM capacitor embedded in partially-filled TSV is proposed and evaluated. The electrical characteristics of 3-D MIM capacitors confirm
that the new design effectively mitigates the process-induced thermo-mechanical stress between TSV Cu core and the surrounding structures. The leakage current at a bias of 3 V is reduced from 1.85 mA for a fully-filled (=30μm), test vehicle to
13.58 pA for a partially-filled test vehicle (=40μm), which is comparable to the leakage current of 4.61 pA for a planar MIM capacitor. An ultra-high capacitance of 6,449.0 nF/μm2 is also achieved for the 3-D MIM capacitor embedded in the partially
filled 40 μm TSV. |
| first_indexed | 2024-10-01T06:42:09Z |
| format | Conference Paper |
| id | ntu-10356/144088 |
| institution | Nanyang Technological University |
| language | English |
| last_indexed | 2024-10-01T06:42:09Z |
| publishDate | 2020 |
| record_format | dspace |
| spelling | ntu-10356/1440882020-10-13T04:41:13Z Electrical characteristics of three-dimensional metal-insulator-metal (3-D MIM) capacitor embedded in partially-filled Through-Silicon Via (TSV) Lin, Ye Li, Hong Yu Tan, Chuan Seng School of Electrical and Electronic Engineering 2020 International Conference on Electronics Packaging (ICEP) Engineering::Electrical and electronic engineering::Semiconductors Electrical Characteristics TSV In this work, a new design of 3-D MIM capacitor embedded in partially-filled TSV is proposed and evaluated. The electrical characteristics of 3-D MIM capacitors confirm that the new design effectively mitigates the process-induced thermo-mechanical stress between TSV Cu core and the surrounding structures. The leakage current at a bias of 3 V is reduced from 1.85 mA for a fully-filled (=30μm), test vehicle to 13.58 pA for a partially-filled test vehicle (=40μm), which is comparable to the leakage current of 4.61 pA for a planar MIM capacitor. An ultra-high capacitance of 6,449.0 nF/μm2 is also achieved for the 3-D MIM capacitor embedded in the partially filled 40 μm TSV. Agency for Science, Technology and Research (A*STAR) Accepted version This work is supported by Agency for Science, Technology and Research (A*STAR) under Individual Research Grant #A1783c0004. 2020-10-13T02:50:44Z 2020-10-13T02:50:44Z 2020 Conference Paper Lin, Y., Li, H. Y., & Tan, C. S. (2020). Electrical characteristics of three-dimensional metal-insulator-metal (3-D MIM) capacitor embedded in partially-filled Through-Silicon Via (TSV). 2020 International Conference on Electronics Packaging (ICEP). https://hdl.handle.net/10356/144088 en A1783c0004 © 2020 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. application/pdf |
| spellingShingle | Engineering::Electrical and electronic engineering::Semiconductors Electrical Characteristics TSV Lin, Ye Li, Hong Yu Tan, Chuan Seng Electrical characteristics of three-dimensional metal-insulator-metal (3-D MIM) capacitor embedded in partially-filled Through-Silicon Via (TSV) |
| title | Electrical characteristics of three-dimensional metal-insulator-metal (3-D MIM) capacitor embedded in partially-filled Through-Silicon Via (TSV) |
| title_full | Electrical characteristics of three-dimensional metal-insulator-metal (3-D MIM) capacitor embedded in partially-filled Through-Silicon Via (TSV) |
| title_fullStr | Electrical characteristics of three-dimensional metal-insulator-metal (3-D MIM) capacitor embedded in partially-filled Through-Silicon Via (TSV) |
| title_full_unstemmed | Electrical characteristics of three-dimensional metal-insulator-metal (3-D MIM) capacitor embedded in partially-filled Through-Silicon Via (TSV) |
| title_short | Electrical characteristics of three-dimensional metal-insulator-metal (3-D MIM) capacitor embedded in partially-filled Through-Silicon Via (TSV) |
| title_sort | electrical characteristics of three dimensional metal insulator metal 3 d mim capacitor embedded in partially filled through silicon via tsv |
| topic | Engineering::Electrical and electronic engineering::Semiconductors Electrical Characteristics TSV |
| url | https://hdl.handle.net/10356/144088 |
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