A dc-reactor-based solid-state fault current limiter for HVdc applications
Expansion of high-voltage dc (HVdc) systems to multi-terminal HVdc (MT-HVdc) systems/grids considerably increases the short-circuit levels. In order to protect the emerging MT-HVdc systems/grids against fault currents, proper dc fault current limiters (FCLs) must be developed. This paper proposes an...
| Main Authors: | , , , |
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| Other Authors: | |
| Format: | Journal Article |
| Language: | English |
| Published: |
2020
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| Subjects: | |
| Online Access: | https://hdl.handle.net/10356/144517 |
| _version_ | 1826111299898048512 |
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| author | Heidary, Amir Radmanesh, Hamid Rouzbehi, Kumars Pou, Josep |
| author2 | School of Electrical and Electronic Engineering |
| author_facet | School of Electrical and Electronic Engineering Heidary, Amir Radmanesh, Hamid Rouzbehi, Kumars Pou, Josep |
| author_sort | Heidary, Amir |
| collection | NTU |
| description | Expansion of high-voltage dc (HVdc) systems to multi-terminal HVdc (MT-HVdc) systems/grids considerably increases the short-circuit levels. In order to protect the emerging MT-HVdc systems/grids against fault currents, proper dc fault current limiters (FCLs) must be developed. This paper proposes an innovative high inductance solid-state dc-reactor-based FCL (HISS-DCRFCL) to be used in HVdc applications. In fact, during the HISS-DCRFCL normal operation, its inductance value is extremely low, and its value becomes considerably high during the fault period, which decreases the fault current amplitude. The proposed HISS-DCRFCL performance is analyzed by MATLAB/Simulink and the simulation results are verified and confirmed by laboratory experimental results using a scaled-down laboratory prototype setup. |
| first_indexed | 2024-10-01T02:48:25Z |
| format | Journal Article |
| id | ntu-10356/144517 |
| institution | Nanyang Technological University |
| language | English |
| last_indexed | 2024-10-01T02:48:25Z |
| publishDate | 2020 |
| record_format | dspace |
| spelling | ntu-10356/1445172020-11-10T08:44:30Z A dc-reactor-based solid-state fault current limiter for HVdc applications Heidary, Amir Radmanesh, Hamid Rouzbehi, Kumars Pou, Josep School of Electrical and Electronic Engineering Engineering::Electrical and electronic engineering HVdc Fault Current Limiters Expansion of high-voltage dc (HVdc) systems to multi-terminal HVdc (MT-HVdc) systems/grids considerably increases the short-circuit levels. In order to protect the emerging MT-HVdc systems/grids against fault currents, proper dc fault current limiters (FCLs) must be developed. This paper proposes an innovative high inductance solid-state dc-reactor-based FCL (HISS-DCRFCL) to be used in HVdc applications. In fact, during the HISS-DCRFCL normal operation, its inductance value is extremely low, and its value becomes considerably high during the fault period, which decreases the fault current amplitude. The proposed HISS-DCRFCL performance is analyzed by MATLAB/Simulink and the simulation results are verified and confirmed by laboratory experimental results using a scaled-down laboratory prototype setup. Accepted version 2020-11-10T08:44:30Z 2020-11-10T08:44:30Z 2019 Journal Article Heidary, A., Radmanesh, H., Rouzbehi, K., & Pou, J. (2019). A dc-reactor-based solid-state fault current limiter for HVdc applications. IEEE Transactions on Power Delivery, 34(2), 720-728. doi:10.1109/tpwrd.2019.2894521 0885-8977 https://hdl.handle.net/10356/144517 10.1109/TPWRD.2019.2894521 2 34 720 728 en IEEE Transactions on Power Delivery © 2019 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. The published version is available at: https://doi.org/10.1109/TPWRD.2019.2894521. application/pdf |
| spellingShingle | Engineering::Electrical and electronic engineering HVdc Fault Current Limiters Heidary, Amir Radmanesh, Hamid Rouzbehi, Kumars Pou, Josep A dc-reactor-based solid-state fault current limiter for HVdc applications |
| title | A dc-reactor-based solid-state fault current limiter for HVdc applications |
| title_full | A dc-reactor-based solid-state fault current limiter for HVdc applications |
| title_fullStr | A dc-reactor-based solid-state fault current limiter for HVdc applications |
| title_full_unstemmed | A dc-reactor-based solid-state fault current limiter for HVdc applications |
| title_short | A dc-reactor-based solid-state fault current limiter for HVdc applications |
| title_sort | dc reactor based solid state fault current limiter for hvdc applications |
| topic | Engineering::Electrical and electronic engineering HVdc Fault Current Limiters |
| url | https://hdl.handle.net/10356/144517 |
| work_keys_str_mv | AT heidaryamir adcreactorbasedsolidstatefaultcurrentlimiterforhvdcapplications AT radmaneshhamid adcreactorbasedsolidstatefaultcurrentlimiterforhvdcapplications AT rouzbehikumars adcreactorbasedsolidstatefaultcurrentlimiterforhvdcapplications AT poujosep adcreactorbasedsolidstatefaultcurrentlimiterforhvdcapplications AT heidaryamir dcreactorbasedsolidstatefaultcurrentlimiterforhvdcapplications AT radmaneshhamid dcreactorbasedsolidstatefaultcurrentlimiterforhvdcapplications AT rouzbehikumars dcreactorbasedsolidstatefaultcurrentlimiterforhvdcapplications AT poujosep dcreactorbasedsolidstatefaultcurrentlimiterforhvdcapplications |