Fast and cycle-accurate simulation of RTL NoC designs using test-driven cellular automata
Speeding up the register-transfer level (RTL) simulation of network-on-chip (NoC) is essential for design optimization under various use scenarios and parameters. One of the promising approaches for RTL NoC speedup is high-level modeling. Conventional high-level modeling approaches lead to an accura...
| 主要な著者: | , , , |
|---|---|
| その他の著者: | |
| フォーマット: | Journal Article |
| 言語: | English |
| 出版事項: |
2021
|
| 主題: | |
| オンライン･アクセス: | https://hdl.handle.net/10356/145879 |
| _version_ | 1826127201870807040 |
|---|---|
| author | Seok, Moon Gi Sarjoughian, Hessam S. Choi, Changbeom Park, Daejin |
| author2 | School of Computer Science and Engineering |
| author_facet | School of Computer Science and Engineering Seok, Moon Gi Sarjoughian, Hessam S. Choi, Changbeom Park, Daejin |
| author_sort | Seok, Moon Gi |
| collection | NTU |
| description | Speeding up the register-transfer level (RTL) simulation of network-on-chip (NoC) is essential for design optimization under various use scenarios and parameters. One of the promising approaches for RTL NoC speedup is high-level modeling. Conventional high-level modeling approaches lead to an accuracy problem or modeling efforts that are caused by the absence of modeling framework or requiring in-depth knowledge of specific behaviors of target NoCs. To support cycle-accurate and formal high-level modeling framework, we propose a cellular automata (CA) modeling framework for RTL NoC. The CA abstracts detailed RTL NoC dynamics into the proposed high-level state transitions, which support flit transmission among CA components through dynamically changing flit paths based on the target RTL routing and arbitration algorithms. To prevent the meaningless execution of stable CA, the CA are designed to be triggered by state-change events. The proposed simulation engine asynchronously invokes CA to update their states and perform actions of flit transmissions or flit-path changes based on the state-decision result. To reduce the modeling difficulty, we provide a test environment that generates the state-transition rules for CA after monitoring the relationships between high-level states and leading actions under randomly injected packets during target RTL NoC simulations. Experiments demonstrate cycle-level functional homogeneity between RTL and the abstracted CA NoC models and significant simulation speedup. |
| first_indexed | 2024-10-01T07:04:55Z |
| format | Journal Article |
| id | ntu-10356/145879 |
| institution | Nanyang Technological University |
| language | English |
| last_indexed | 2024-10-01T07:04:55Z |
| publishDate | 2021 |
| record_format | dspace |
| spelling | ntu-10356/1458792021-01-13T05:01:33Z Fast and cycle-accurate simulation of RTL NoC designs using test-driven cellular automata Seok, Moon Gi Sarjoughian, Hessam S. Choi, Changbeom Park, Daejin School of Computer Science and Engineering Engineering::Computer science and engineering Network On Chip Cellular Automata Speeding up the register-transfer level (RTL) simulation of network-on-chip (NoC) is essential for design optimization under various use scenarios and parameters. One of the promising approaches for RTL NoC speedup is high-level modeling. Conventional high-level modeling approaches lead to an accuracy problem or modeling efforts that are caused by the absence of modeling framework or requiring in-depth knowledge of specific behaviors of target NoCs. To support cycle-accurate and formal high-level modeling framework, we propose a cellular automata (CA) modeling framework for RTL NoC. The CA abstracts detailed RTL NoC dynamics into the proposed high-level state transitions, which support flit transmission among CA components through dynamically changing flit paths based on the target RTL routing and arbitration algorithms. To prevent the meaningless execution of stable CA, the CA are designed to be triggered by state-change events. The proposed simulation engine asynchronously invokes CA to update their states and perform actions of flit transmissions or flit-path changes based on the state-decision result. To reduce the modeling difficulty, we provide a test environment that generates the state-transition rules for CA after monitoring the relationships between high-level states and leading actions under randomly injected packets during target RTL NoC simulations. Experiments demonstrate cycle-level functional homogeneity between RTL and the abstracted CA NoC models and significant simulation speedup. Published version 2021-01-13T05:01:33Z 2021-01-13T05:01:33Z 2020 Journal Article Seok, M. G., Sarjoughian, H. S., Choi, C., & Park, D. (2020). Fast and cycle-accurate simulation of RTL NoC designs using test-driven cellular automata. IEEE Access, 8, 2670-2686. doi:10.1109/ACCESS.2019.2962253 2169-3536 0000-0002-8159-9910 0000-0002-1326-9485 0000-0002-4826-7949 0000-0002-5560-873X https://hdl.handle.net/10356/145879 10.1109/ACCESS.2019.2962253 2-s2.0-85077269442 8 2670 2686 en IEEE Access © 2020 IEEE. This journal is 100% open access, which means that all content is freely available without charge to users or their institutions. All articles accepted after 12 June 2019 are published under a CC BY 4.0 license, and the author retains copyright. Users are allowed to read, download, copy, distribute, print, search, or link to the full texts of the articles, or use them for any other lawful purpose, as long as proper attribution is given. application/pdf |
| spellingShingle | Engineering::Computer science and engineering Network On Chip Cellular Automata Seok, Moon Gi Sarjoughian, Hessam S. Choi, Changbeom Park, Daejin Fast and cycle-accurate simulation of RTL NoC designs using test-driven cellular automata |
| title | Fast and cycle-accurate simulation of RTL NoC designs using test-driven cellular automata |
| title_full | Fast and cycle-accurate simulation of RTL NoC designs using test-driven cellular automata |
| title_fullStr | Fast and cycle-accurate simulation of RTL NoC designs using test-driven cellular automata |
| title_full_unstemmed | Fast and cycle-accurate simulation of RTL NoC designs using test-driven cellular automata |
| title_short | Fast and cycle-accurate simulation of RTL NoC designs using test-driven cellular automata |
| title_sort | fast and cycle accurate simulation of rtl noc designs using test driven cellular automata |
| topic | Engineering::Computer science and engineering Network On Chip Cellular Automata |
| url | https://hdl.handle.net/10356/145879 |
| work_keys_str_mv | AT seokmoongi fastandcycleaccuratesimulationofrtlnocdesignsusingtestdrivencellularautomata AT sarjoughianhessams fastandcycleaccuratesimulationofrtlnocdesignsusingtestdrivencellularautomata AT choichangbeom fastandcycleaccuratesimulationofrtlnocdesignsusingtestdrivencellularautomata AT parkdaejin fastandcycleaccuratesimulationofrtlnocdesignsusingtestdrivencellularautomata |