Rapid design exploration framework for application-aware customization of soft core processors

Rapid design exploration framework for application-aware customization of soft core processors

Off-the-shelf soft core processors are becoming increasingly popular in embedded systems design today as they provide for application specific customization, in particular through instruction subsetting. However, choosing the right processor configuration remains a challenge as the search space beco...

Volledige beschrijving

Bibliografische gegevens
Hoofdauteurs:	Prakash, Alok, Lam, Siew-Kei, Singh, Amit Kumar, Srikanthan, Thambipillai
Andere auteurs:	School of Computer Science and Engineering
Formaat:	Conference Paper
Taal:	English
Gepubliceerd in:	2021
Onderwerpen:	Embedded System Engineering::Computer science and engineering Application Software Hardware
Online toegang:	https://hdl.handle.net/10356/146241

Gelijkaardige items

Framework for rapid performance estimation of embedded soft core processors
door: Wijesundera, Deshya, et al.
Gepubliceerd in: (2020)

Rapid memory-aware selection of hardware accelerators in programmable SoC design
door: Prakash, Alok, et al.
Gepubliceerd in: (2019)

Rapid technique to eliminate moving shadows for accurate vehicle detection
door: Garg, Kratika, et al.
Gepubliceerd in: (2021)

Exploiting FPGA-aware merging of custom instructions for runtime reconfiguration
door: Lam, Siew-Kei, et al.
Gepubliceerd in: (2013)

FPGA-aware custom instructions for reconfigurable instruction set processors
door: Lam, Siew Kei
Gepubliceerd in: (2011)

Hierarchical framework for runtime intrusion detection in embedded systems
door: Muhamed Fauzi Bin Abbas, et al.
Gepubliceerd in: (2021)

Customizable embedded processors : design technologies and applications /
door: Ienne, Paolo, et al.
Gepubliceerd in: (2007)

Iris recognition using stable dark features
door: Liu, Bo, et al.
Gepubliceerd in: (2014)

DNN model theft through trojan side-channel on edge FPGA accelerator
door: Chandrasekar, Srivatsan, et al.
Gepubliceerd in: (2024)

Evaluating the merits of ranking in structured network pruning
door: Sharma, Kuldeep, et al.
Gepubliceerd in: (2021)

Rapid and robust background modeling technique for low-cost road traffic surveillance systems
door: Garg, Kratika, et al.
Gepubliceerd in: (2021)

Longevity framework: leveraging online integrated aging-aware hierarchical mapping and VF-selection for lifetime reliability optimization in manycore processors
door: Rathore, Vijeta, et al.
Gepubliceerd in: (2022)

CIDPro : custom instructions for dynamic program diversification
door: Pham, Thinh Hung, et al.
Gepubliceerd in: (2021)

Accelerating throughput-aware runtime mapping for heterogeneous MPSoCs
door: Singh, Amit Kumar, et al.
Gepubliceerd in: (2013)

VHDL modelling and asic design of a shortest-path processor core for network routing /
door: 443150 Teoh, Giap Seng
Gepubliceerd in: (2003)

Embedded processor design challenges : systems, architectures, modeling and simulation - SAMOS /
door: Deprettere, Ed F., 1944-, et al.
Gepubliceerd in: (2002)

Soft core and hard core vector processors using vector backend
door: Soh, Jun Jie
Gepubliceerd in: (2014)

Genetic algorithm based EV scheduling for on-demand public transit system
door: Perera, Thilina, et al.
Gepubliceerd in: (2021)

Performance estimation of FPGA modules for modular design methodology using artificial neural network
door: Herath, Kalindu, et al.
Gepubliceerd in: (2020)

A hybrid methodology for optimal fleet management in an electric vehicle based flexible bus service
door: Perera, Thilina, et al.
Gepubliceerd in: (2021)

Genetic algorithm based dynamic scheduling of EV in a demand responsive bus service for first mile transit
door: Perera, Thilina, et al.
Gepubliceerd in: (2021)

USB soft core with altera Nios processor
door: Cheah, Chee Teong
Gepubliceerd in: (2007)

USB soft core with altera nios processor /
door: 231564 Cheah, Chee Teong
Gepubliceerd in: (2007)

Collaborative adaptation for energy-efficient heterogeneous mobile SoCs
door: Singh, Amit Kumar, et al.
Gepubliceerd in: (2021)

Image processing using Altera Nios II processor /
door: 287381 Ting, Anne Ai Nee, et al.
Gepubliceerd in: (2007)

A framework for fast and robust visual odometry
door: Wu, Meiqing, et al.
Gepubliceerd in: (2021)

Verilog design of A 256-BIT AES crypto processor core /
door: 246310 Lai, Yit Pin
Gepubliceerd in: (2007)

Custom soft processor emulator MIPS-simulator
door: Farn, Shao Qiu
Gepubliceerd in: (2014)

Pipelined processor farms : structured design for embedded parallel systems /
door: Fleury, Martin, 1951-, et al.
Gepubliceerd in: (2001)

Constraint-aware configurable system-on-chip design for embedded computing
door: Alok Prakash
Gepubliceerd in: (2014)

Embedded accelerators
door: Thambipillai Srikanthan.
Gepubliceerd in: (2009)

Median filter using altera nios II processor and sort hardware /
door: 267473 Nadiah Azmi, et al.
Gepubliceerd in: (2008)

Image processing using Altera Nios II processor [electronic resource]/
door: 287381 Ting, Anne Ai Nee, et al.
Gepubliceerd in: (2007)

VHDL design of A 32-Bit RISC processor core for FPGA implementation /
door: Nadzir Muhammad Marsono 612152
Gepubliceerd in: (2001)

Guppy : a GPU-like soft-core processor
door: Hagiescu, Andrei, et al.
Gepubliceerd in: (2013)

Accelerating computer vision algorithms on heterogeneous edge computing platforms
door: Prakash, Alok, et al.
Gepubliceerd in: (2021)

A first study of compressive sensing for side-channel leakage sampling
door: Ou, Changhai, et al.
Gepubliceerd in: (2020)

Addressing productivity challenges in domain-specific reconfigurable platforms : a case study on extended kalman filter-based motor control
door: Aung, Yan Lin, et al.
Gepubliceerd in: (2015)

Verilog design of A 256-BIT AES crypto processor core [electronic resource] /
door: 246310 Lai, Yit Pin
Gepubliceerd in: (2007)

Point to point protocol core for embedded system using VHDL /
door: 296003 Chew, Yoong Han
Gepubliceerd in: (2001)