Deep neural network (DNN) optimized design of 2.45 GHz CMOS rectifier with 73.6% peak efficiency for RF energy harvesting

Deep neural network (DNN) optimized design of 2.45 GHz CMOS rectifier with 73.6% peak efficiency for RF energy harvesting

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This article presents a two-stage rectifier with novel DC-boosted gate bias for RF energy harvesting. The auxiliary gate bias enables rectifier to operate when input amplitude is smaller than its transistor threshold voltage while constraining the positive gate voltage during off state to reduce the...

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Bibliographic Details
Main Authors: Lau, Wendy Wee Yee, Ho, Heng Wah, Siek, Liter
Other Authors: School of Electrical and Electronic Engineering
Format: Journal Article
Language:English
Published: 2021
Subjects:
Engineering::Electrical and electronic engineering::Electric power
Energy Harvesting
Rectifiers
RF-DC Converters
Deep Neural Network
Deep Learning
Design Automation
Design Optimization
Online Access:https://hdl.handle.net/10356/152104
Description
Summary:This article presents a two-stage rectifier with novel DC-boosted gate bias for RF energy harvesting. The auxiliary gate bias enables rectifier to operate when input amplitude is smaller than its transistor threshold voltage while constraining the positive gate voltage during off state to reduce the reverse leakage current. An automated design optimization methodology using Deep Neural Network (DNN) to maximize efficiency is presented. The DNN is shown to accurately model SPICE simulated response of rectifier. Hence, the design phase turnaround time is minimized with fast prediction of optimized design parameters. The proposed rectifier has been fabricated in 65 nm standard CMOS technology. A maximum power conversion efficiency of 73.6% is measured at 2.45 GHz with input power of -6 dBm. The proposed rectifier has a measured sensitivity of -12 dBm for 1 V output voltage.

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