A transient-enhanced low dropout regulator with rail to rail dynamic impedance attenuation buffer suitable for commercial design
A low-dropout regulator (LDO) for portable application with a high output swing and dynamic biased impedance-attenuation buffer is presented in this paper. The proposed buffer pushes the dominated pole introduced by the LDO's power FET to higher frequency without consuming large quiescent curre...
| Main Authors: | , , |
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| Other Authors: | |
| Format: | Journal Article |
| Language: | English |
| Published: |
2021
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| Subjects: | |
| Online Access: | https://hdl.handle.net/10356/152320 |
| _version_ | 1826118247810859008 |
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| author | Li Kan Zheng, Yuanjin Siek, Liter |
| author2 | School of Electrical and Electronic Engineering |
| author_facet | School of Electrical and Electronic Engineering Li Kan Zheng, Yuanjin Siek, Liter |
| author_sort | Li Kan |
| collection | NTU |
| description | A low-dropout regulator (LDO) for portable application with a high output swing and dynamic biased impedance-attenuation buffer is presented in this paper. The proposed buffer pushes the dominated pole introduced by the LDO's power FET to higher frequency without consuming large quiescent current. The LDO loop with only one dominant pole within unity gain loop bandwidth is realized. A dynamic current sensing circuit is adopted to make the design more robust. The buffer features a rail-to-rail swing which makes the LDO's power FET size smaller than traditional buffer design for the same current deliverability. A low cost method for trimming is introduced to achieve high yield suitable for commercial design. The LDO has been fabricated in a 0.18 µm HV CMOS process. It draws a total current of 40 µA and is able to deliver up to 600 mA of load current. The proposed method for trimming allows for a high yield of approaching 100%, with line/load regulation error <2%, and the maximum transient output voltage variation of 3% with a load step from 1 mA to 600 mA in 100 ns. |
| first_indexed | 2024-10-01T04:40:35Z |
| format | Journal Article |
| id | ntu-10356/152320 |
| institution | Nanyang Technological University |
| language | English |
| last_indexed | 2024-10-01T04:40:35Z |
| publishDate | 2021 |
| record_format | dspace |
| spelling | ntu-10356/1523202021-08-05T05:54:26Z A transient-enhanced low dropout regulator with rail to rail dynamic impedance attenuation buffer suitable for commercial design Li Kan Zheng, Yuanjin Siek, Liter School of Electrical and Electronic Engineering VIRTUS, IC Design Centre of Excellence Engineering::Electrical and electronic engineering Linear Regulator High Output Swing Buffer Power FET Loop Stability Offset Trim A low-dropout regulator (LDO) for portable application with a high output swing and dynamic biased impedance-attenuation buffer is presented in this paper. The proposed buffer pushes the dominated pole introduced by the LDO's power FET to higher frequency without consuming large quiescent current. The LDO loop with only one dominant pole within unity gain loop bandwidth is realized. A dynamic current sensing circuit is adopted to make the design more robust. The buffer features a rail-to-rail swing which makes the LDO's power FET size smaller than traditional buffer design for the same current deliverability. A low cost method for trimming is introduced to achieve high yield suitable for commercial design. The LDO has been fabricated in a 0.18 µm HV CMOS process. It draws a total current of 40 µA and is able to deliver up to 600 mA of load current. The proposed method for trimming allows for a high yield of approaching 100%, with line/load regulation error <2%, and the maximum transient output voltage variation of 3% with a load step from 1 mA to 600 mA in 100 ns. 2021-08-05T05:54:25Z 2021-08-05T05:54:25Z 2017 Journal Article Li Kan, Zheng, Y. & Siek, L. (2017). A transient-enhanced low dropout regulator with rail to rail dynamic impedance attenuation buffer suitable for commercial design. Microelectronics Journal, 63, 27-34. https://dx.doi.org/10.1016/j.mejo.2017.02.017 0026-2692 https://hdl.handle.net/10356/152320 10.1016/j.mejo.2017.02.017 63 27 34 en Microelectronics Journal © 2017 Elsevier Ltd. All rights reserved. |
| spellingShingle | Engineering::Electrical and electronic engineering Linear Regulator High Output Swing Buffer Power FET Loop Stability Offset Trim Li Kan Zheng, Yuanjin Siek, Liter A transient-enhanced low dropout regulator with rail to rail dynamic impedance attenuation buffer suitable for commercial design |
| title | A transient-enhanced low dropout regulator with rail to rail dynamic impedance attenuation buffer suitable for commercial design |
| title_full | A transient-enhanced low dropout regulator with rail to rail dynamic impedance attenuation buffer suitable for commercial design |
| title_fullStr | A transient-enhanced low dropout regulator with rail to rail dynamic impedance attenuation buffer suitable for commercial design |
| title_full_unstemmed | A transient-enhanced low dropout regulator with rail to rail dynamic impedance attenuation buffer suitable for commercial design |
| title_short | A transient-enhanced low dropout regulator with rail to rail dynamic impedance attenuation buffer suitable for commercial design |
| title_sort | transient enhanced low dropout regulator with rail to rail dynamic impedance attenuation buffer suitable for commercial design |
| topic | Engineering::Electrical and electronic engineering Linear Regulator High Output Swing Buffer Power FET Loop Stability Offset Trim |
| url | https://hdl.handle.net/10356/152320 |
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