LTspice implementation of PKU compact model of metal-oxide-based RRAM : part A simulation of DC current-voltage characteristics of RRAM device
Resistive-switching random access memory (RRAM) is a kind of nonvolatile memory (NVM) that is based on resistance changes to store data. The concept is not new, but the interest of IC industry in RRAM has been grown during recent years due to RRAM’s potential advantages of high density, high sp...
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| Other Authors: | |
| Format: | Thesis-Master by Coursework |
| Language: | English |
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Nanyang Technological University
2021
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| Online Access: | https://hdl.handle.net/10356/153654 |
| _version_ | 1811676914241241088 |
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| author | Su, Ziheng |
| author2 | Chen Tupei |
| author_facet | Chen Tupei Su, Ziheng |
| author_sort | Su, Ziheng |
| collection | NTU |
| description | Resistive-switching random access memory (RRAM) is a kind of nonvolatile memory
(NVM) that is based on resistance changes to store data. The concept is not new, but
the interest of IC industry in RRAM has been grown during recent years due to
RRAM’s potential advantages of high density, high speed, and low power consumption.
Because of its considerable prospect of miniaturization, RRAM is a promising
candidate among emerging NVMs as other NVMs such as FeRAM and MRAM have
difficulties in reducing their size further.
In this thesis, a physics-based compact model of metal oxide-based RRAM cell, which
was developed by the PKU research team, is implemented in LTspice for RRAM
device simulation. The I-V characteristics of the high-/low-resistance state of RRAM
under DC sweep mode in both SET and RESET processes have been successfully
produced by the simulation. The simulation result basically agrees with the typical
experimental observation reported by the PKU research team. The impact of both the
compliance current in the SET process and the reset stop voltage in the RESET process
has been examined. |
| first_indexed | 2024-10-01T02:29:02Z |
| format | Thesis-Master by Coursework |
| id | ntu-10356/153654 |
| institution | Nanyang Technological University |
| language | English |
| last_indexed | 2024-10-01T02:29:02Z |
| publishDate | 2021 |
| publisher | Nanyang Technological University |
| record_format | dspace |
| spelling | ntu-10356/1536542023-07-04T17:03:24Z LTspice implementation of PKU compact model of metal-oxide-based RRAM : part A simulation of DC current-voltage characteristics of RRAM device Su, Ziheng Chen Tupei School of Electrical and Electronic Engineering EChenTP@ntu.edu.sg Engineering::Electrical and electronic engineering::Electronic circuits Resistive-switching random access memory (RRAM) is a kind of nonvolatile memory (NVM) that is based on resistance changes to store data. The concept is not new, but the interest of IC industry in RRAM has been grown during recent years due to RRAM’s potential advantages of high density, high speed, and low power consumption. Because of its considerable prospect of miniaturization, RRAM is a promising candidate among emerging NVMs as other NVMs such as FeRAM and MRAM have difficulties in reducing their size further. In this thesis, a physics-based compact model of metal oxide-based RRAM cell, which was developed by the PKU research team, is implemented in LTspice for RRAM device simulation. The I-V characteristics of the high-/low-resistance state of RRAM under DC sweep mode in both SET and RESET processes have been successfully produced by the simulation. The simulation result basically agrees with the typical experimental observation reported by the PKU research team. The impact of both the compliance current in the SET process and the reset stop voltage in the RESET process has been examined. Master of Science (Electronics) 2021-12-08T04:01:06Z 2021-12-08T04:01:06Z 2021 Thesis-Master by Coursework Su, Z. (2021). LTspice implementation of PKU compact model of metal-oxide-based RRAM : part A simulation of DC current-voltage characteristics of RRAM device. Master's thesis, Nanyang Technological University, Singapore. https://hdl.handle.net/10356/153654 https://hdl.handle.net/10356/153654 en application/pdf Nanyang Technological University |
| spellingShingle | Engineering::Electrical and electronic engineering::Electronic circuits Su, Ziheng LTspice implementation of PKU compact model of metal-oxide-based RRAM : part A simulation of DC current-voltage characteristics of RRAM device |
| title | LTspice implementation of PKU compact model of metal-oxide-based RRAM : part A simulation of DC current-voltage characteristics of RRAM device |
| title_full | LTspice implementation of PKU compact model of metal-oxide-based RRAM : part A simulation of DC current-voltage characteristics of RRAM device |
| title_fullStr | LTspice implementation of PKU compact model of metal-oxide-based RRAM : part A simulation of DC current-voltage characteristics of RRAM device |
| title_full_unstemmed | LTspice implementation of PKU compact model of metal-oxide-based RRAM : part A simulation of DC current-voltage characteristics of RRAM device |
| title_short | LTspice implementation of PKU compact model of metal-oxide-based RRAM : part A simulation of DC current-voltage characteristics of RRAM device |
| title_sort | ltspice implementation of pku compact model of metal oxide based rram part a simulation of dc current voltage characteristics of rram device |
| topic | Engineering::Electrical and electronic engineering::Electronic circuits |
| url | https://hdl.handle.net/10356/153654 |
| work_keys_str_mv | AT suziheng ltspiceimplementationofpkucompactmodelofmetaloxidebasedrrampartasimulationofdccurrentvoltagecharacteristicsofrramdevice |