An integrated multi-channel biopotential recording analog front-end IC with area-efficient driven-right-leg circuit
A multi-channel biopotential recording analog front-end (AFE) with a fully integrated area-efficient driven-right-leg (DRL) circuit is presented in this paper. The proposed AFE includes 10 channels of low-noise capacitive coupled instrumentation amplifier (CCIA), one shared 10-bit SAR ADC and a full...
| Main Authors: | , , , , |
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| Other Authors: | |
| Format: | Journal Article |
| Language: | English |
| Published: |
2022
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| Online Access: | https://hdl.handle.net/10356/155175 |
| _version_ | 1826114902919479296 |
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| author | Tang, Tao Goh, Wang Ling Yao, Lei Cheong, Jia Hao Gao, Yuan |
| author2 | School of Electrical and Electronic Engineering |
| author_facet | School of Electrical and Electronic Engineering Tang, Tao Goh, Wang Ling Yao, Lei Cheong, Jia Hao Gao, Yuan |
| author_sort | Tang, Tao |
| collection | NTU |
| description | A multi-channel biopotential recording analog front-end (AFE) with a fully integrated area-efficient driven-right-leg (DRL) circuit is presented in this paper. The proposed AFE includes 10 channels of low-noise capacitive coupled instrumentation amplifier (CCIA), one shared 10-bit SAR ADC and a fully integrated DRL to enhance the system-level common-mode rejection ratio (CMRR). The proposed DRL circuit senses the common-mode at the CCIA output so that the AFE gain is reused as the DRL loop gain. Therefore, area efficient unit-gain buffer with small averaging capacitors can be used in DRL circuit to reduce the circuit area significantly. The proposed AFE has been implemented in a standard 0.18-μm CMOS process. The DRL circuit achieved more than 85% chip area reduction compared to the state-of-art on-chip DRL circuits and maximum 60 dB enhancement to system-level CMRR. Measurement results show high/low AFE gain of 60 dB/54 dB respectively with 1 μA/channel current consumption under 1.0 V power supply. The measured AFE input-referred noise in 1 Hz - 10k Hz range is 4.2 μVrms and the maximum system-level CMRR is 110 dB. |
| first_indexed | 2024-10-01T03:46:48Z |
| format | Journal Article |
| id | ntu-10356/155175 |
| institution | Nanyang Technological University |
| language | English |
| last_indexed | 2024-10-01T03:46:48Z |
| publishDate | 2022 |
| record_format | dspace |
| spelling | ntu-10356/1551752022-02-15T08:15:42Z An integrated multi-channel biopotential recording analog front-end IC with area-efficient driven-right-leg circuit Tang, Tao Goh, Wang Ling Yao, Lei Cheong, Jia Hao Gao, Yuan School of Electrical and Electronic Engineering Engineering::Electrical and electronic engineering Biopotential Recording Common Mode Rejection Ratio A multi-channel biopotential recording analog front-end (AFE) with a fully integrated area-efficient driven-right-leg (DRL) circuit is presented in this paper. The proposed AFE includes 10 channels of low-noise capacitive coupled instrumentation amplifier (CCIA), one shared 10-bit SAR ADC and a fully integrated DRL to enhance the system-level common-mode rejection ratio (CMRR). The proposed DRL circuit senses the common-mode at the CCIA output so that the AFE gain is reused as the DRL loop gain. Therefore, area efficient unit-gain buffer with small averaging capacitors can be used in DRL circuit to reduce the circuit area significantly. The proposed AFE has been implemented in a standard 0.18-μm CMOS process. The DRL circuit achieved more than 85% chip area reduction compared to the state-of-art on-chip DRL circuits and maximum 60 dB enhancement to system-level CMRR. Measurement results show high/low AFE gain of 60 dB/54 dB respectively with 1 μA/channel current consumption under 1.0 V power supply. The measured AFE input-referred noise in 1 Hz - 10k Hz range is 4.2 μVrms and the maximum system-level CMRR is 110 dB. Agency for Science, Technology and Research (A*STAR) This work was supported by A∗STAR (Agency for Science, Technology and Research) BMRC (Biomedical Research Council), Singapore, under Grant IAF311022. This paper was recommended by Associate Editor Y. Zheng. (Corresponding author: Yuan Gao.) 2022-02-15T08:15:42Z 2022-02-15T08:15:42Z 2020 Journal Article Tang, T., Goh, W. L., Yao, L., Cheong, J. H. & Gao, Y. (2020). An integrated multi-channel biopotential recording analog front-end IC with area-efficient driven-right-leg circuit. IEEE Transactions On Biomedical Circuits and Systems, 14(2), 297-304. https://dx.doi.org/10.1109/TBCAS.2019.2959412 1932-4545 https://hdl.handle.net/10356/155175 10.1109/TBCAS.2019.2959412 31831435 2-s2.0-85082635066 2 14 297 304 en IAF311022 IEEE transactions on biomedical circuits and systems © 2019 IEEE. All rights reserved. |
| spellingShingle | Engineering::Electrical and electronic engineering Biopotential Recording Common Mode Rejection Ratio Tang, Tao Goh, Wang Ling Yao, Lei Cheong, Jia Hao Gao, Yuan An integrated multi-channel biopotential recording analog front-end IC with area-efficient driven-right-leg circuit |
| title | An integrated multi-channel biopotential recording analog front-end IC with area-efficient driven-right-leg circuit |
| title_full | An integrated multi-channel biopotential recording analog front-end IC with area-efficient driven-right-leg circuit |
| title_fullStr | An integrated multi-channel biopotential recording analog front-end IC with area-efficient driven-right-leg circuit |
| title_full_unstemmed | An integrated multi-channel biopotential recording analog front-end IC with area-efficient driven-right-leg circuit |
| title_short | An integrated multi-channel biopotential recording analog front-end IC with area-efficient driven-right-leg circuit |
| title_sort | integrated multi channel biopotential recording analog front end ic with area efficient driven right leg circuit |
| topic | Engineering::Electrical and electronic engineering Biopotential Recording Common Mode Rejection Ratio |
| url | https://hdl.handle.net/10356/155175 |
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