MRAM integration with L2 memory for a near threshold RISC-V core : implementing a low power IoT node for AI applications
IoT edge devices of the past were designed primarily of sensors and a microcontroller that controlled the influx of data and the sensor operations. The microcontrollers had some pre-processing capabilities and their subsequent major task was to transmit this data to the central node where all the pr...
Main Author: | Shantanu, Raoke |
---|---|
Other Authors: | Kim Tae Hyoung |
Format: | Thesis-Master by Coursework |
Language: | English |
Published: |
Nanyang Technological University
2022
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Subjects: | |
Online Access: | https://hdl.handle.net/10356/156009 |
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