Framework for mapping computing-in-memory to basic neural networks

With the advent of the era of big data, the application of neural networks on edge devices has received extensive attention. However, the traditional Von Neumann architecture shows the disadvantages of high latency, low throughput, and decreasing energy efficiency in the data-intensive algorithms, s...

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Main Author: Shang, Hongyang
Other Authors: Kim Tae Hyoung
Format: Thesis-Master by Coursework
Language:English
Published: Nanyang Technological University 2022
Subjects:
Online Access:https://hdl.handle.net/10356/159014
_version_ 1826128147119079424
author Shang, Hongyang
author2 Kim Tae Hyoung
author_facet Kim Tae Hyoung
Shang, Hongyang
author_sort Shang, Hongyang
collection NTU
description With the advent of the era of big data, the application of neural networks on edge devices has received extensive attention. However, the traditional Von Neumann architecture shows the disadvantages of high latency, low throughput, and decreasing energy efficiency in the data-intensive algorithms, so it is of great significance to develop new computing architectures. Computing-in-memory architecture has been proposed as a practical neural network accelerator with the natural advantage for multiply-accumulate (MAC) operations caused by its parallel computing structure. At present, most of the research on CIM chips focuses on the development of the memory elements and the design of computing circuits, and less work is done on automated tools that support the CIM chip design. Therefore, this paper proposes a software framework for mapping CIM to basic neural networks. The mapping framework is a semi-automatic data mapping workflow, which is mainly composed of two sub-tasks: the neural network quantization and the neural network mapping. It can achieve quantization with arbitrary bit-width precision, and perform flexible data mapping scheme according to the design of CIM macros. This work can help CIM chip developers to verify the calculation results of chips, and promote the development of CIM chip automation tools.
first_indexed 2024-10-01T07:20:10Z
format Thesis-Master by Coursework
id ntu-10356/159014
institution Nanyang Technological University
language English
last_indexed 2024-10-01T07:20:10Z
publishDate 2022
publisher Nanyang Technological University
record_format dspace
spelling ntu-10356/1590142022-06-05T11:39:00Z Framework for mapping computing-in-memory to basic neural networks Shang, Hongyang Kim Tae Hyoung School of Electrical and Electronic Engineering THKIM@ntu.edu.sg Engineering::Electrical and electronic engineering With the advent of the era of big data, the application of neural networks on edge devices has received extensive attention. However, the traditional Von Neumann architecture shows the disadvantages of high latency, low throughput, and decreasing energy efficiency in the data-intensive algorithms, so it is of great significance to develop new computing architectures. Computing-in-memory architecture has been proposed as a practical neural network accelerator with the natural advantage for multiply-accumulate (MAC) operations caused by its parallel computing structure. At present, most of the research on CIM chips focuses on the development of the memory elements and the design of computing circuits, and less work is done on automated tools that support the CIM chip design. Therefore, this paper proposes a software framework for mapping CIM to basic neural networks. The mapping framework is a semi-automatic data mapping workflow, which is mainly composed of two sub-tasks: the neural network quantization and the neural network mapping. It can achieve quantization with arbitrary bit-width precision, and perform flexible data mapping scheme according to the design of CIM macros. This work can help CIM chip developers to verify the calculation results of chips, and promote the development of CIM chip automation tools. Master of Science (Electronics) 2022-06-05T11:39:00Z 2022-06-05T11:39:00Z 2022 Thesis-Master by Coursework Shang, H. (2022). Framework for mapping computing-in-memory to basic neural networks. Master's thesis, Nanyang Technological University, Singapore. https://hdl.handle.net/10356/159014 https://hdl.handle.net/10356/159014 en ISM-DISS-03044 application/pdf Nanyang Technological University
spellingShingle Engineering::Electrical and electronic engineering
Shang, Hongyang
Framework for mapping computing-in-memory to basic neural networks
title Framework for mapping computing-in-memory to basic neural networks
title_full Framework for mapping computing-in-memory to basic neural networks
title_fullStr Framework for mapping computing-in-memory to basic neural networks
title_full_unstemmed Framework for mapping computing-in-memory to basic neural networks
title_short Framework for mapping computing-in-memory to basic neural networks
title_sort framework for mapping computing in memory to basic neural networks
topic Engineering::Electrical and electronic engineering
url https://hdl.handle.net/10356/159014
work_keys_str_mv AT shanghongyang frameworkformappingcomputinginmemorytobasicneuralnetworks