Camouflaged circuit evaluations based on graph neural network

Chip security has become an area that needs to be focused on in today's industry because it is a huge challenge to patents and will bring huge harm to the interests of chip design companies. This project is based on the optimization of the process in Dr. Ho Weng Geng's SAT TOOL. Before...

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Main Author: Zhang, Yifan
Other Authors: Gwee Bah Hwee
Format: Thesis-Master by Coursework
Language:English
Published: Nanyang Technological University 2023
Subjects:
Online Access:https://hdl.handle.net/10356/164944
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author Zhang, Yifan
author2 Gwee Bah Hwee
author_facet Gwee Bah Hwee
Zhang, Yifan
author_sort Zhang, Yifan
collection NTU
description Chip security has become an area that needs to be focused on in today's industry because it is a huge challenge to patents and will bring huge harm to the interests of chip design companies. This project is based on the optimization of the process in Dr. Ho Weng Geng's SAT TOOL. Before camouflaging the chip in Dr. Ho, it is necessary to bring the discriminating inputs obtained by the algorithm into the SAT attack to attack the circuit, find the circuit structure that can be cracked, and then camouflage it with a camouflaged gate to protect the chip. However, in this process, it takes a huge amount of time to generate discriminating inputs. Through the combination of circuit structure and GNN deep learning network, the generation efficiency is improved. The neural network of this project first performs output partition on the circuit to obtain the Sub Circuit. Convert the Sub Circuit to obtain the input circuit of the GNN network, combine the node labeling process, and then use it as input data of the GIN network to evaluate the output probability distribution, and under the guidance of the teacher signal, Loss backward continuously learns to obtain the model. Under the guidance of the model, an ideal input sequence is generated. From the experimental results, it can be known that the GNN module only needs about 4.5ms to do attack sequence generation while SAT Tool needs 224ms on average. And the elimination rate of the GNN module is much higher than that of SAT Tool.
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spelling ntu-10356/1649442023-03-01T05:44:40Z Camouflaged circuit evaluations based on graph neural network Zhang, Yifan Gwee Bah Hwee School of Electrical and Electronic Engineering ebhgwee@ntu.edu.sg Engineering::Electrical and electronic engineering Chip security has become an area that needs to be focused on in today's industry because it is a huge challenge to patents and will bring huge harm to the interests of chip design companies. This project is based on the optimization of the process in Dr. Ho Weng Geng's SAT TOOL. Before camouflaging the chip in Dr. Ho, it is necessary to bring the discriminating inputs obtained by the algorithm into the SAT attack to attack the circuit, find the circuit structure that can be cracked, and then camouflage it with a camouflaged gate to protect the chip. However, in this process, it takes a huge amount of time to generate discriminating inputs. Through the combination of circuit structure and GNN deep learning network, the generation efficiency is improved. The neural network of this project first performs output partition on the circuit to obtain the Sub Circuit. Convert the Sub Circuit to obtain the input circuit of the GNN network, combine the node labeling process, and then use it as input data of the GIN network to evaluate the output probability distribution, and under the guidance of the teacher signal, Loss backward continuously learns to obtain the model. Under the guidance of the model, an ideal input sequence is generated. From the experimental results, it can be known that the GNN module only needs about 4.5ms to do attack sequence generation while SAT Tool needs 224ms on average. And the elimination rate of the GNN module is much higher than that of SAT Tool. Master of Science (Electronics) 2023-03-01T05:44:40Z 2023-03-01T05:44:40Z 2023 Thesis-Master by Coursework Zhang, Y. (2023). Camouflaged circuit evaluations based on graph neural network. Master's thesis, Nanyang Technological University, Singapore. https://hdl.handle.net/10356/164944 https://hdl.handle.net/10356/164944 en D-256-21221-03347 application/pdf Nanyang Technological University
spellingShingle Engineering::Electrical and electronic engineering
Zhang, Yifan
Camouflaged circuit evaluations based on graph neural network
title Camouflaged circuit evaluations based on graph neural network
title_full Camouflaged circuit evaluations based on graph neural network
title_fullStr Camouflaged circuit evaluations based on graph neural network
title_full_unstemmed Camouflaged circuit evaluations based on graph neural network
title_short Camouflaged circuit evaluations based on graph neural network
title_sort camouflaged circuit evaluations based on graph neural network
topic Engineering::Electrical and electronic engineering
url https://hdl.handle.net/10356/164944
work_keys_str_mv AT zhangyifan camouflagedcircuitevaluationsbasedongraphneuralnetwork