AcceleNetor: FPGA-accelerated neural network implementation for side-channel analysis
Data-intensive machine learning applications require significant computing power, which cannot be efficiently handled by general-purpose microprocessors. Field Programmable Gate Arrays (FPGAs) offer a solution by allowing the creation of application-specific circuits that can accelerate these tasks...
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| Format: | Final Year Project (FYP) |
| Language: | English |
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Nanyang Technological University
2023
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| Online Access: | https://hdl.handle.net/10356/166976 |
| _version_ | 1824455097628753920 |
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| author | Wang, Di |
| author2 | Chang Chip Hong |
| author_facet | Chang Chip Hong Wang, Di |
| author_sort | Wang, Di |
| collection | NTU |
| description | Data-intensive machine learning applications require significant computing power, which cannot be efficiently handled by general-purpose microprocessors. Field Programmable Gate Arrays (FPGAs) offer a solution by allowing the creation of application-specific circuits that can accelerate these tasks with high throughput and low latency.
This project aims to explore existing open-source research on FPGA accelerators and optimize them using a more effective computation model. The accelerator will also be implemented such that it can defend against some Side-Channel Attacks. The resulting accelerator will be implemented on the DE-10 standard FPGA board. The report will detail the methodologies used, the challenges faced, and the evolution of the final product from ideation to maturity. |
| first_indexed | 2025-02-19T03:32:48Z |
| format | Final Year Project (FYP) |
| id | ntu-10356/166976 |
| institution | Nanyang Technological University |
| language | English |
| last_indexed | 2025-02-19T03:32:48Z |
| publishDate | 2023 |
| publisher | Nanyang Technological University |
| record_format | dspace |
| spelling | ntu-10356/1669762023-07-07T15:45:30Z AcceleNetor: FPGA-accelerated neural network implementation for side-channel analysis Wang, Di Chang Chip Hong School of Electrical and Electronic Engineering Centre for Integrated Circuits and Systems ECHChang@ntu.edu.sg Engineering::Electrical and electronic engineering::Integrated circuits Data-intensive machine learning applications require significant computing power, which cannot be efficiently handled by general-purpose microprocessors. Field Programmable Gate Arrays (FPGAs) offer a solution by allowing the creation of application-specific circuits that can accelerate these tasks with high throughput and low latency. This project aims to explore existing open-source research on FPGA accelerators and optimize them using a more effective computation model. The accelerator will also be implemented such that it can defend against some Side-Channel Attacks. The resulting accelerator will be implemented on the DE-10 standard FPGA board. The report will detail the methodologies used, the challenges faced, and the evolution of the final product from ideation to maturity. Bachelor of Engineering (Electrical and Electronic Engineering) 2023-05-20T11:45:51Z 2023-05-20T11:45:51Z 2023 Final Year Project (FYP) Wang, D. (2023). AcceleNetor: FPGA-accelerated neural network implementation for side-channel analysis. Final Year Project (FYP), Nanyang Technological University, Singapore. https://hdl.handle.net/10356/166976 https://hdl.handle.net/10356/166976 en A2102-221 application/pdf Nanyang Technological University |
| spellingShingle | Engineering::Electrical and electronic engineering::Integrated circuits Wang, Di AcceleNetor: FPGA-accelerated neural network implementation for side-channel analysis |
| title | AcceleNetor: FPGA-accelerated neural network implementation for side-channel analysis |
| title_full | AcceleNetor: FPGA-accelerated neural network implementation for side-channel analysis |
| title_fullStr | AcceleNetor: FPGA-accelerated neural network implementation for side-channel analysis |
| title_full_unstemmed | AcceleNetor: FPGA-accelerated neural network implementation for side-channel analysis |
| title_short | AcceleNetor: FPGA-accelerated neural network implementation for side-channel analysis |
| title_sort | accelenetor fpga accelerated neural network implementation for side channel analysis |
| topic | Engineering::Electrical and electronic engineering::Integrated circuits |
| url | https://hdl.handle.net/10356/166976 |
| work_keys_str_mv | AT wangdi accelenetorfpgaacceleratedneuralnetworkimplementationforsidechannelanalysis |