The modelling and design of a current steering digital-to-analog converter (CS-DAC)
This paper deals with several segmentation designs of Current Steering Digital-to-Analog Converter. The project aims to implement a 10-bit CS-DAC and verify the model in a transistor-level implementation with the 55nm CMOS technology. The supply voltage is at 1.2V with the total current from the CS-...
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| Format: | Final Year Project (FYP) |
| Language: | English |
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Nanyang Technological University
2023
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| Online Access: | https://hdl.handle.net/10356/167097 |
| Summary: | This paper deals with several segmentation designs of Current Steering Digital-to-Analog Converter. The project aims to implement a 10-bit CS-DAC and verify the model in a transistor-level implementation with the 55nm CMOS technology. The supply voltage is at 1.2V with the total current from the CS-DAC IDAC of 2mA. It also includes the investigation of the performance trade-off of using different segmentation scheme. |
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