Embedded design of test jig for control interface
This project focuses on controlling the test jig using I2C communication in python to access the health condition of the test boards, valve controller and signal generator. Understanding the layers between the microchip libraries, main code functions and testing of the test board. Tests performed fo...
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| Other Authors: | |
| Format: | Final Year Project (FYP) |
| Language: | English |
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Nanyang Technological University
2023
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| Online Access: | https://hdl.handle.net/10356/167432 |
| _version_ | 1826123258331660288 |
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| author | Ling, Arvin Yan Dong |
| author2 | Shen Zhongxiang |
| author_facet | Shen Zhongxiang Ling, Arvin Yan Dong |
| author_sort | Ling, Arvin Yan Dong |
| collection | NTU |
| description | This project focuses on controlling the test jig using I2C communication in python to access the health condition of the test boards, valve controller and signal generator. Understanding the layers between the microchip libraries, main code functions and testing of the test board. Tests performed for each test board includes communication, condition of the board and the functionality. |
| first_indexed | 2024-10-01T06:01:43Z |
| format | Final Year Project (FYP) |
| id | ntu-10356/167432 |
| institution | Nanyang Technological University |
| language | English |
| last_indexed | 2024-10-01T06:01:43Z |
| publishDate | 2023 |
| publisher | Nanyang Technological University |
| record_format | dspace |
| spelling | ntu-10356/1674322023-07-07T17:42:28Z Embedded design of test jig for control interface Ling, Arvin Yan Dong Shen Zhongxiang School of Electrical and Electronic Engineering EZXShen@ntu.edu.sg Engineering::Electrical and electronic engineering This project focuses on controlling the test jig using I2C communication in python to access the health condition of the test boards, valve controller and signal generator. Understanding the layers between the microchip libraries, main code functions and testing of the test board. Tests performed for each test board includes communication, condition of the board and the functionality. Bachelor of Engineering (Electrical and Electronic Engineering) 2023-05-26T07:57:08Z 2023-05-26T07:57:08Z 2023 Final Year Project (FYP) Ling, A. Y. D. (2023). Embedded design of test jig for control interface. Final Year Project (FYP), Nanyang Technological University, Singapore. https://hdl.handle.net/10356/167432 https://hdl.handle.net/10356/167432 en A2174-221 application/pdf Nanyang Technological University |
| spellingShingle | Engineering::Electrical and electronic engineering Ling, Arvin Yan Dong Embedded design of test jig for control interface |
| title | Embedded design of test jig for control interface |
| title_full | Embedded design of test jig for control interface |
| title_fullStr | Embedded design of test jig for control interface |
| title_full_unstemmed | Embedded design of test jig for control interface |
| title_short | Embedded design of test jig for control interface |
| title_sort | embedded design of test jig for control interface |
| topic | Engineering::Electrical and electronic engineering |
| url | https://hdl.handle.net/10356/167432 |
| work_keys_str_mv | AT lingarvinyandong embeddeddesignoftestjigforcontrolinterface |