Hardware and algorithm co-optimization for energy-efficient machine learning integrated circuits
The future of computing faces a new challenge as the computing enhancements offered by the technology scaling alone cannot address the shortage of processing capability caused by the exponential growth of data generation. The traditional Von Neumann digital architecture struggles to perform while ca...
| मुख्य लेखक: | |
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| अन्य लेखक: | |
| स्वरूप: | Thesis-Doctor of Philosophy |
| भाषा: | English |
| प्रकाशित: |
Nanyang Technological University
2023
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| विषय: | |
| ऑनलाइन पहुंच: | https://hdl.handle.net/10356/168401 |