Hardware implementation of modulo multipliers for international data encryption algorithm
Keeping the information secret is one of the key functions of cryptography. In recent years, a lot of research is done in the area of block cipher algorithms. International Data Encryption Algorithm (IDEA) is one of the most reliable block cipher algorithm. Among the three basic operations, modu...
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| Format: | Final Year Project (FYP) |
| Language: | English |
| Published: |
2009
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| Online Access: | http://hdl.handle.net/10356/17063 |
| Summary: | Keeping the information secret is one of the key functions of cryptography. In recent years, a lot of research is done in the area of block cipher algorithms. International Data Encryption Algorithm (IDEA) is one of the most reliable block cipher algorithm.
Among the three basic operations, modulo (2^16+1) multiplication is most critical for the efficient algorithm implementation. In this project, two efficient modulo multiplier designs are coded in VHDL language and they are simulated using ModelSim. |
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