| Summary: | Memory exists everywhere around us; digital memory lies in every single one of our
electronic devices. With the increasing demand, the current standards of memories
such as: Static RAM (SRAM), Dynamic RAM (DRAM, and Flash memory are slowly
losing out in terms of performance and power requirement. Consequently, rise of
emerging non-volatile memory is imminent, and out of all these new emerging
technologies, Resistive RAM (ReRAM) stands out as the best option to replace Flash
memory due to its high on-off ratio, fast read and write speed, high endurance and
potential low power characteristics. This project aims to design a 32 by 32 ReRAM
array and simulate its writing (SET, PRESET) and reading state while keeping it as
low power usage as possible. Finally, a complete circuit is optimized to achieve low
power consumption while successfully simulating the read and write process of the
ReRAM.
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