A new carry look-ahead adder architecture optimized for speed and energy

A new carry look-ahead adder architecture optimized for speed and energy

We introduce a new carry look-ahead adder (NCLA) architecture that employs non-uniform-size carry look-ahead adder (CLA) modules, in contrast to the conventional CLA (CCLA) architecture, which utilizes uniform-size CLA modules. We adopted two strategies for the implementation of the NCLA. Our novel...

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Bibliographic Details
Main Authors: Balasubramanian, Padmanabhan, Maskell, Douglas Leslie
Other Authors: College of Computing and Data Science
Format: Journal Article
Language:English
Published: 2024
Subjects:
Computer and Information Science
Engineering
Arithmetic circuits
Digital circuits
Adder
High-speed
Energy-efficient
ASIC
CMOS
Online Access:https://hdl.handle.net/10356/180361

Internet

https://hdl.handle.net/10356/180361

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