Design and comparison of adder topologies for high performance computing
Efficient adder design is critical for enhancing high-performance computing systems. This dissertation explores the design, implementation, and analysis of radix-2 adders, with a particular focus on parallel prefix adder topologies. The study begins with a comprehensive review of existing adde...
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| Format: | Thesis-Master by Coursework |
| Language: | English |
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Nanyang Technological University
2025
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| Online Access: | https://hdl.handle.net/10356/182586 |
| _version_ | 1824453780281753600 |
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| author | Gong, Wenkang |
| author2 | Jong Ching Chuen |
| author_facet | Jong Ching Chuen Gong, Wenkang |
| author_sort | Gong, Wenkang |
| collection | NTU |
| description | Efficient adder design is critical for enhancing high-performance computing systems. This
dissertation explores the design, implementation, and analysis of radix-2 adders, with a
particular focus on parallel prefix adder topologies. The study begins with a comprehensive
review of existing adder architectures, including simple adders, carry-select adders, and various
parallel prefix designs such as Kogge-Stone, Brent-Kung, and Ladner-Fischer. Through
theoretical analysis and practical implementation using Verilog and EDA tools, the research
evaluates the timing, power consumption, and area utilization of these adders, providing a
comparative analysis of their strengths and weaknesses. Results highlight the trade-offs between
speed, power efficiency, and area, offering insights into optimal adder selection for specific
applications. Limitations of the study and potential areas for future work, such as exploring
emerging technologies and optimizing adder designs for specialized applications, are discussed.
This research contributes to advancing efficient arithmetic designs in modern computing |
| first_indexed | 2025-02-19T03:11:51Z |
| format | Thesis-Master by Coursework |
| id | ntu-10356/182586 |
| institution | Nanyang Technological University |
| language | English |
| last_indexed | 2025-02-19T03:11:51Z |
| publishDate | 2025 |
| publisher | Nanyang Technological University |
| record_format | dspace |
| spelling | ntu-10356/1825862025-02-14T15:51:28Z Design and comparison of adder topologies for high performance computing Gong, Wenkang Jong Ching Chuen School of Electrical and Electronic Engineering ECCJONG@ntu.edu.sg Engineering Adder design Efficiency Power Area Efficient adder design is critical for enhancing high-performance computing systems. This dissertation explores the design, implementation, and analysis of radix-2 adders, with a particular focus on parallel prefix adder topologies. The study begins with a comprehensive review of existing adder architectures, including simple adders, carry-select adders, and various parallel prefix designs such as Kogge-Stone, Brent-Kung, and Ladner-Fischer. Through theoretical analysis and practical implementation using Verilog and EDA tools, the research evaluates the timing, power consumption, and area utilization of these adders, providing a comparative analysis of their strengths and weaknesses. Results highlight the trade-offs between speed, power efficiency, and area, offering insights into optimal adder selection for specific applications. Limitations of the study and potential areas for future work, such as exploring emerging technologies and optimizing adder designs for specialized applications, are discussed. This research contributes to advancing efficient arithmetic designs in modern computing Master's degree 2025-02-11T05:08:31Z 2025-02-11T05:08:31Z 2024 Thesis-Master by Coursework Gong, W. (2024). Design and comparison of adder topologies for high performance computing. Master's thesis, Nanyang Technological University, Singapore. https://hdl.handle.net/10356/182586 https://hdl.handle.net/10356/182586 en application/pdf Nanyang Technological University |
| spellingShingle | Engineering Adder design Efficiency Power Area Gong, Wenkang Design and comparison of adder topologies for high performance computing |
| title | Design and comparison of adder topologies for high performance computing |
| title_full | Design and comparison of adder topologies for high performance computing |
| title_fullStr | Design and comparison of adder topologies for high performance computing |
| title_full_unstemmed | Design and comparison of adder topologies for high performance computing |
| title_short | Design and comparison of adder topologies for high performance computing |
| title_sort | design and comparison of adder topologies for high performance computing |
| topic | Engineering Adder design Efficiency Power Area |
| url | https://hdl.handle.net/10356/182586 |
| work_keys_str_mv | AT gongwenkang designandcomparisonofaddertopologiesforhighperformancecomputing |