Mixed-signal integrated circuits for neuromorphic computing
In neuromorphic computing, the traditional von Neumann architecture faces efficiency bottlenecks due to the frequent data transfers between memory and processors. This limitation has provided an opportunity for the development of IMC architectures. RRAM, as a mature non-volatile memory device, is wi...
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| Format: | Thesis-Master by Coursework |
| Language: | English |
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Nanyang Technological University
2025
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| Online Access: | https://hdl.handle.net/10356/182693 |
| _version_ | 1826126780627419136 |
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| author | Yu, Quanhan |
| author2 | Kim Tae Hyoung |
| author_facet | Kim Tae Hyoung Yu, Quanhan |
| author_sort | Yu, Quanhan |
| collection | NTU |
| description | In neuromorphic computing, the traditional von Neumann architecture faces efficiency bottlenecks due to the frequent data transfers between memory and processors. This limitation has provided an opportunity for the development of IMC architectures. RRAM, as a mature non-volatile memory device, is widely used in IMC architectures and can accommodate an intrinsic impedance boosting technique to effectively suppress output distortion. This paper presents the design of mixed-signal integrated circuits to convert the MAC computation results of an RRAM array into digital outputs. The integrated circuit utilizes an 8-bit SAR
ADC structure, designed on a 40nm technology node using Cadence, which can achieve a sampling rate of 66.7 MHz. Under simulation conditions of 27°C and a 1 V power supply, the designed ADC achieved an ENOB of 7.80 bits, a DNL of +0.4/-0.2, and an INL of +0.4/-0.3. The total power consumption was measured at 89.18 µW, with the FOMW and FOMS reaching 6 fJ/conv-step and 167.46 dB, respectively. |
| first_indexed | 2025-03-09T14:23:29Z |
| format | Thesis-Master by Coursework |
| id | ntu-10356/182693 |
| institution | Nanyang Technological University |
| language | English |
| last_indexed | 2025-03-09T14:23:29Z |
| publishDate | 2025 |
| publisher | Nanyang Technological University |
| record_format | dspace |
| spelling | ntu-10356/1826932025-02-21T15:48:58Z Mixed-signal integrated circuits for neuromorphic computing Yu, Quanhan Kim Tae Hyoung School of Electrical and Electronic Engineering THKIM@ntu.edu.sg Engineering Neuromorphic computing RRAM SAR ADC In neuromorphic computing, the traditional von Neumann architecture faces efficiency bottlenecks due to the frequent data transfers between memory and processors. This limitation has provided an opportunity for the development of IMC architectures. RRAM, as a mature non-volatile memory device, is widely used in IMC architectures and can accommodate an intrinsic impedance boosting technique to effectively suppress output distortion. This paper presents the design of mixed-signal integrated circuits to convert the MAC computation results of an RRAM array into digital outputs. The integrated circuit utilizes an 8-bit SAR ADC structure, designed on a 40nm technology node using Cadence, which can achieve a sampling rate of 66.7 MHz. Under simulation conditions of 27°C and a 1 V power supply, the designed ADC achieved an ENOB of 7.80 bits, a DNL of +0.4/-0.2, and an INL of +0.4/-0.3. The total power consumption was measured at 89.18 µW, with the FOMW and FOMS reaching 6 fJ/conv-step and 167.46 dB, respectively. Master's degree 2025-02-17T08:23:02Z 2025-02-17T08:23:02Z 2024 Thesis-Master by Coursework Yu, Q. (2024). Mixed-signal integrated circuits for neuromorphic computing. Master's thesis, Nanyang Technological University, Singapore. https://hdl.handle.net/10356/182693 https://hdl.handle.net/10356/182693 en application/pdf Nanyang Technological University |
| spellingShingle | Engineering Neuromorphic computing RRAM SAR ADC Yu, Quanhan Mixed-signal integrated circuits for neuromorphic computing |
| title | Mixed-signal integrated circuits for neuromorphic computing |
| title_full | Mixed-signal integrated circuits for neuromorphic computing |
| title_fullStr | Mixed-signal integrated circuits for neuromorphic computing |
| title_full_unstemmed | Mixed-signal integrated circuits for neuromorphic computing |
| title_short | Mixed-signal integrated circuits for neuromorphic computing |
| title_sort | mixed signal integrated circuits for neuromorphic computing |
| topic | Engineering Neuromorphic computing RRAM SAR ADC |
| url | https://hdl.handle.net/10356/182693 |
| work_keys_str_mv | AT yuquanhan mixedsignalintegratedcircuitsforneuromorphiccomputing |