CMOS cells design with cross-coupled latches
This project attempts on integrating cross coupled circuit into two CMOS cells designed with new circuit techniques. Output buffer and current mode sense amplifier are the two circuits of interests. In addition, optimization of area utilization of SRAM cell column and its peripheral circuits is also...
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| Other Authors: | |
| Format: | Thesis |
| Language: | English |
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2009
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| Online Access: | http://hdl.handle.net/10356/19803 |
| _version_ | 1811695234269052928 |
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| author | Chee, Piew Yoong. |
| author2 | Liu, Po-ching |
| author_facet | Liu, Po-ching Chee, Piew Yoong. |
| author_sort | Chee, Piew Yoong. |
| collection | NTU |
| description | This project attempts on integrating cross coupled circuit into two CMOS cells designed with new circuit techniques. Output buffer and current mode sense amplifier are the two circuits of interests. In addition, optimization of area utilization of SRAM cell column and its peripheral circuits is also investigated. |
| first_indexed | 2024-10-01T07:20:14Z |
| format | Thesis |
| id | ntu-10356/19803 |
| institution | Nanyang Technological University |
| language | English |
| last_indexed | 2024-10-01T07:20:14Z |
| publishDate | 2009 |
| record_format | dspace |
| spelling | ntu-10356/198032023-07-04T16:03:20Z CMOS cells design with cross-coupled latches Chee, Piew Yoong. Liu, Po-ching School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits This project attempts on integrating cross coupled circuit into two CMOS cells designed with new circuit techniques. Output buffer and current mode sense amplifier are the two circuits of interests. In addition, optimization of area utilization of SRAM cell column and its peripheral circuits is also investigated. Master of Engineering 2009-12-14T06:38:40Z 2009-12-14T06:38:40Z 1992 1992 Thesis http://hdl.handle.net/10356/19803 en NANYANG TECHNOLOGICAL UNIVERSITY 142 p. application/pdf |
| spellingShingle | DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits Chee, Piew Yoong. CMOS cells design with cross-coupled latches |
| title | CMOS cells design with cross-coupled latches |
| title_full | CMOS cells design with cross-coupled latches |
| title_fullStr | CMOS cells design with cross-coupled latches |
| title_full_unstemmed | CMOS cells design with cross-coupled latches |
| title_short | CMOS cells design with cross-coupled latches |
| title_sort | cmos cells design with cross coupled latches |
| topic | DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits |
| url | http://hdl.handle.net/10356/19803 |
| work_keys_str_mv | AT cheepiewyoong cmoscellsdesignwithcrosscoupledlatches |