Application of RISC technology to image processing
This thesis describes the design and implementation of the mRISC processor - a multistreaming RISC processor for image processing. The multistreaming approach to instruction execution fetches instructions from multiple independent streams into the pipeline for execution. This novel approach eliminat...
| Main Author: | |
|---|---|
| Other Authors: | |
| Format: | Thesis |
| Language: | English |
| Published: |
2009
|
| Subjects: | |
| Online Access: | http://hdl.handle.net/10356/19805 |
| _version_ | 1811688733837099008 |
|---|---|
| author | Choe, Swee Yew. |
| author2 | Chan, Choong Wah |
| author_facet | Chan, Choong Wah Choe, Swee Yew. |
| author_sort | Choe, Swee Yew. |
| collection | NTU |
| description | This thesis describes the design and implementation of the mRISC processor - a multistreaming RISC processor for image processing. The multistreaming approach to instruction execution fetches instructions from multiple independent streams into the pipeline for execution. This novel approach eliminates both data and control hazards inherent in a pipeline execution. Data and control dependencies in the pipeline necessitate the pipeline to stall, degrading its performance. Popular techniques that deal with these dependencies mitigate the pipeline penalty to a certain degree, but are unable to prevent their occurrence completely. With the adoption of the multistreaming approach, there is no pipeline break and a sustained throughput of one instruction per cycle is achieved. |
| first_indexed | 2024-10-01T05:36:54Z |
| format | Thesis |
| id | ntu-10356/19805 |
| institution | Nanyang Technological University |
| language | English |
| last_indexed | 2024-10-01T05:36:54Z |
| publishDate | 2009 |
| record_format | dspace |
| spelling | ntu-10356/198052023-07-04T15:29:43Z Application of RISC technology to image processing Choe, Swee Yew. Chan, Choong Wah School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering::Computer hardware, software and systems This thesis describes the design and implementation of the mRISC processor - a multistreaming RISC processor for image processing. The multistreaming approach to instruction execution fetches instructions from multiple independent streams into the pipeline for execution. This novel approach eliminates both data and control hazards inherent in a pipeline execution. Data and control dependencies in the pipeline necessitate the pipeline to stall, degrading its performance. Popular techniques that deal with these dependencies mitigate the pipeline penalty to a certain degree, but are unable to prevent their occurrence completely. With the adoption of the multistreaming approach, there is no pipeline break and a sustained throughput of one instruction per cycle is achieved. Master of Engineering 2009-12-14T06:38:46Z 2009-12-14T06:38:46Z 1992 1992 Thesis http://hdl.handle.net/10356/19805 en NANYANG TECHNOLOGICAL UNIVERSITY 243 p. application/pdf |
| spellingShingle | DRNTU::Engineering::Electrical and electronic engineering::Computer hardware, software and systems Choe, Swee Yew. Application of RISC technology to image processing |
| title | Application of RISC technology to image processing |
| title_full | Application of RISC technology to image processing |
| title_fullStr | Application of RISC technology to image processing |
| title_full_unstemmed | Application of RISC technology to image processing |
| title_short | Application of RISC technology to image processing |
| title_sort | application of risc technology to image processing |
| topic | DRNTU::Engineering::Electrical and electronic engineering::Computer hardware, software and systems |
| url | http://hdl.handle.net/10356/19805 |
| work_keys_str_mv | AT choesweeyew applicationofrisctechnologytoimageprocessing |